[dpdk-dev] [PATCH 0/3] i40e VXLAN TX checksum rework

Liu, Jijiang jijiang.liu at intel.com
Thu Nov 27 13:06:14 CET 2014



> -----Original Message-----
> From: Olivier MATZ [mailto:olivier.matz at 6wind.com]
> Sent: Thursday, November 27, 2014 6:13 PM
> To: Liu, Jijiang; dev at dpdk.org
> Subject: Re: [dpdk-dev] [PATCH 0/3] i40e VXLAN TX checksum rework
> 
> 
> >> We have got some feedback about backward compatibility of VXLAN TX
> >> checksum offload API with 1G/10G NIC after the i40e VXLAN TX checksum
> >> codes were applied, so we have to rework the APIs on i40e, including
> >> the changes of mbuf, i40e PMD and csum engine.
> >>
> >> The main changes in mbuf are as follows, In place of removing
> >> PKT_TX_VXLAN_CKSUM, we introducing 2 new flags:
> >> PKT_TX_OUT_IP_CKSUM, PKT_TX_UDP_TUNNEL_PKT, and a new field:
> l4_tun_len.
> >
> > What about PKT_TX_OUT_UDP_CKSUM instead of
> PKT_TX_UDP_TUNNEL_PKT? It's
> > maybe more coherent with the other names.
> 
> oh I just realized that the flag is not for asking to the hardware to calculate the
> outer UDP checksum.
> So why does the hardware need this information?


As I said before, this flag is used to tell FVL that the transmit packet is a UDP tunneling packet.
In FVL, there is a register need to configured, see below.

L4 Tunneling Type (Teredo / GRE header / VXLAN header) indication:
00b - No UDP / GRE tunneling (field must be set to zero if EIPT equals to zero)
01b - UDP tunneling header (Any UDP tunneling, VxLAN and Geneve)
10b - GRE tunneling header
Else - reserved



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