[dpdk-dev] [PATCH v3] i40e: enable i40e pmd on ARM platform
Yao, Lei A
lei.a.yao at intel.com
Wed Aug 10 06:42:00 CEST 2016
Hi, Jianbo
I have tested you patch , this v3 patch didn't impact the performance on X86 platform.
Non-vector PMD single core performance with patch : ~35 Mpps
Non-vector PMD single core performance without patch : ~35 Mpps
BRs
Lei
-----Original Message-----
Date: Fri, 5 Aug 2016 14:36:23 +0530
From: Jianbo Liu <jianbo.liu at linaro.org>
To: dev at dpdk.org, helin.zhang at intel.com, jingjing.wu at intel.com
Cc: Jianbo Liu <jianbo.liu at linaro.org>
Subject: [dpdk-dev] [PATCH v3] i40e: enable i40e pmd on ARM platform
Message-ID: <1470387983-12713-1-git-send-email-jianbo.liu at linaro.org>
And add read memory barrier to avoid status inconsistency between two RX descriptors readings.
Signed-off-by: Jianbo Liu <jianbo.liu at linaro.org>
---
config/defconfig_arm64-armv8a-linuxapp-gcc | 2 +-
doc/guides/nics/features/i40e.ini | 1 +
drivers/net/i40e/i40e_rxtx.c | 2 ++
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/config/defconfig_arm64-armv8a-linuxapp-gcc b/config/defconfig_arm64-armv8a-linuxapp-gcc
index 1a17126..08f282b 100644
--- a/config/defconfig_arm64-armv8a-linuxapp-gcc
+++ b/config/defconfig_arm64-armv8a-linuxapp-gcc
@@ -46,6 +46,6 @@ CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_LIBRTE_IVSHMEM=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
-CONFIG_RTE_LIBRTE_I40E_PMD=n
+CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=n
CONFIG_RTE_SCHED_VECTOR=n
diff --git a/doc/guides/nics/features/i40e.ini b/doc/guides/nics/features/i40e.ini
index fb3fb60..0d143bc 100644
--- a/doc/guides/nics/features/i40e.ini
+++ b/doc/guides/nics/features/i40e.ini
@@ -45,3 +45,4 @@ Linux UIO = Y
Linux VFIO = Y
x86-32 = Y
x86-64 = Y
+ARMv8 = Y
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 554d167..57825fb 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -994,6 +994,8 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq)
I40E_RXD_QW1_STATUS_SHIFT;
}
+ rte_smp_rmb();
+
/* Compute how many status bits were set */
for (j = 0, nb_dd = 0; j < I40E_LOOK_AHEAD; j++)
nb_dd += s[j] & (1 << I40E_RX_DESC_STATUS_DD_SHIFT);
--
2.4.11
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