[dpdk-dev] [PATCH 36/39] net/ixgbe/base: update X550em_a backplane speed

[Xiao Wang]

Correct link flow for X550em_a backplane with ALEF.

Report the correct link capabilities:
   SKUs configured for 2.5G only support 2.5G.
   non-10G SKUs can only support 2.5 or 1G.

Signed-off-by: Xiao Wang <xiao.w.wang at intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h |  5 +++++
 drivers/net/ixgbe/base/ixgbe_x550.c | 37 +++++++++++++++++++++++++++++--------
 2 files changed, 34 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 13c520e..4982e03 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -4252,6 +4252,11 @@ struct ixgbe_hw {
 #define IXGBE_NW_MNG_IF_SEL_MDIO_ACT	(1u << 1)
 #define IXGBE_NW_MNG_IF_SEL_MDIO_IF_MODE	(1u << 2)
 #define IXGBE_NW_MNG_IF_SEL_EN_SHARED_MDIO	(1u << 13)
+#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_10M	(1u << 17)
+#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_100M	(1u << 18)
+#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_1G	(1u << 19)
+#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_2_5G	(1u << 20)
+#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_10G	(1u << 21)
 #define IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M (1 << 23)
 #define IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE (1 << 24)
 #define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT 3
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 6f4dfd9..8c2479b 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1887,6 +1887,20 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
 		case ixgbe_phy_sgmii:
 			*speed = IXGBE_LINK_SPEED_1GB_FULL;
 			break;
+		case ixgbe_phy_x550em_kr:
+			if (hw->mac.type == ixgbe_mac_X550EM_a) {
+				/* check different backplane modes */
+				if (hw->phy.nw_mng_if_sel &
+					   IXGBE_NW_MNG_IF_SEL_PHY_SPEED_2_5G) {
+					*speed = IXGBE_LINK_SPEED_2_5GB_FULL;
+					break;
+				} else if (hw->device_id ==
+						   IXGBE_DEV_ID_X550EM_A_KR_L) {
+					*speed = IXGBE_LINK_SPEED_1GB_FULL;
+					break;
+				}
+			}
+			/* fall through */
 		default:
 			*speed = IXGBE_LINK_SPEED_10GB_FULL |
 				 IXGBE_LINK_SPEED_1GB_FULL;
@@ -2109,18 +2123,25 @@ STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,
 		       IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
 		       IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
 
-	if (status)
-		return status;
+	if (hw->mac.type == ixgbe_mac_X550EM_a) {
+		/* Set lane mode  to KR auto negotiation */
+		status = hw->mac.ops.read_iosf_sb_reg(hw,
+				    IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),
+				    IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
 
-	reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK;
-	reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN;
-	reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN;
-	reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN;
-	reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN;
+		if (status)
+			return status;
 
-	status = hw->mac.ops.write_iosf_sb_reg(hw,
+		reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK;
+		reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN;
+		reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN;
+		reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN;
+		reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN;
+
+		status = hw->mac.ops.write_iosf_sb_reg(hw,
 				    IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),
 				    IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
+	}
 
 	return ixgbe_restart_an_internal_phy_x550em(hw);
 }
-- 
1.9.3