[dpdk-dev] [PATCH] ethdev: increase flow type limit from 32 to 64

[Rybalchenko, Kirill]

Hi Adrien, 
after some discussion we found that change I've done 
in Mellanox PMD is not really necessary: size of array
flow_types_mask[] is still 1 and the loop in patch 

for (i = 0; i < RTE_FLOW_MASK_ARRAY_SIZE; i++)
	info->flow_types_mask[i] = 0ULL;

will work exactly in the same way  as assignment

fdir_info->flow_types_mask[0] = 0;

in old version, though new version looks more proper
from programming style point of view.
So what do you think, shall I modify Mellanox PMD,
or better leave it as it is?

Thanks,
Kirill. 


> -----Original Message-----
> From: Adrien Mazarguil [mailto:adrien.mazarguil at 6wind.com]
> Sent: Tuesday 16 January 2018 11:13
> To: Rybalchenko, Kirill <kirill.rybalchenko at intel.com>
> Cc: dev at dpdk.org; Wu, Jingjing <jingjing.wu at intel.com>; Xing, Beilei
> <beilei.xing at intel.com>; johndale at cisco.com; neescoba at cisco.com;
> nelio.laranjeiro at 6wind.com; yskoh at mellanox.com; Lu, Wenzhuo
> <wenzhuo.lu at intel.com>; Ananyev, Konstantin
> <konstantin.ananyev at intel.com>; Chilikin, Andrey
> <andrey.chilikin at intel.com>
> Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64
> 
> On Tue, Jan 09, 2018 at 03:16:13PM +0000, Rybalchenko, Kirill wrote:
> > > -----Original Message-----
> > > From: Adrien Mazarguil [mailto:adrien.mazarguil at 6wind.com]
> > > Sent: Monday 4 December 2017 17:43
> > > To: Rybalchenko, Kirill <kirill.rybalchenko at intel.com>
> > > Cc: dev at dpdk.org; Wu, Jingjing <jingjing.wu at intel.com>; Xing, Beilei
> > > <beilei.xing at intel.com>; johndale at cisco.com; neescoba at cisco.com;
> > > nelio.laranjeiro at 6wind.com; yskoh at mellanox.com; Lu, Wenzhuo
> > > <wenzhuo.lu at intel.com>; Ananyev, Konstantin
> > > <konstantin.ananyev at intel.com>; Chilikin, Andrey
> > > <andrey.chilikin at intel.com>
> > > Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64
> > >
> > > Hi Kirill,
> > >
> > > On Mon, Nov 27, 2017 at 12:29:47PM +0000, Kirill Rybalchenko wrote:
> > > > Increase the internal limit for flow types from 32 to 64 to
> > > > support future flow type extensions.
> > > > Change type of variables from uint32_t[] to uint64_t[]:
> > > >   rte_eth_fdir_info.flow_types_mask
> > > >   rte_eth_hash_global_conf.sym_hash_enable_mask
> > > >   rte_eth_hash_global_conf.valid_bit_mask
> > > >
> > > > This modification affects the following components:
> > > >   net/i40e
> > > >   net/enic
> > > >   net/mlx5
> > > >   net/ixgbe
> > > >   app/testpmd
> > > >
> > > > Signed-off-by: Kirill Rybalchenko <kirill.rybalchenko at intel.com>
> > >
> > > Can you elaborate a bit on the need for these changes?
> > > Have you considered implementing those future extensions through
> > > rte_flow instead?
> >
> > Hi Adrien, this is not a new feature but rather fix of existing limitation.
> > In current implementation the symmetric hash mask and flow mask are
> > represented by 32-bit variable, while hardware bitmask has 64 bits.
> > Unfortunately, this modification changes ABI of the library as it
> > changes size of rte_eth_fdir_info structure. All related PMDs (listed
> > above) had to be modified accordingly.
> 
> OK, no problem with this change. I assume you'll re-submit it since you sent a
> deprecation notice, we'll review/ack subsequent mlx5 patches.
> 
> --
> Adrien Mazarguil
> 6WIND