[dpdk-dev] [PATCH v2] config: enable dpaaX drivers compilation for ARMv8

[Hemant Agrawal]

This patch enables the NXP DPAA & DPAA2 drivers for
ARMV8 targets. They can be used with standard armv8 config
with command line mempool argument or newly introduced
platform mempool internal registration mechanism.

Note that the dpaa(x) specific config files are still preserved
to continue customer support. They also contain some of the ARM
performance tuning flags. e.g the default ARM cache size of 128
is not optimal for NXP platforms.

However, these configs will eventually be removed once a dynamic
mechanisms are developed to detect the performance settings.

Signed-off-by: Hemant Agrawal <hemant.agrawal at nxp.com>
---
 config/common_armv8a_linuxapp             | 58 +++++++++++++++++++++++++++++++
 config/defconfig_arm64-dpaa-linuxapp-gcc  | 20 -----------
 config/defconfig_arm64-dpaa2-linuxapp-gcc | 19 ----------
 3 files changed, 58 insertions(+), 39 deletions(-)

diff --git a/config/common_armv8a_linuxapp b/config/common_armv8a_linuxapp
index 111c005..507b28a 100644
--- a/config/common_armv8a_linuxapp
+++ b/config/common_armv8a_linuxapp
@@ -36,3 +36,61 @@ CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
 CONFIG_RTE_LIBRTE_AVP_PMD=n
 
 CONFIG_RTE_SCHED_VECTOR=n
+
+#
+# ARMv8 Specific driver compilation flags
+#
+
+#
+# Compile NXP DPAA Bus
+#
+CONFIG_RTE_LIBRTE_DPAA_BUS=y
+CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
+
+#
+# Compile NXP DPAA2 FSL-MC Bus
+#
+CONFIG_RTE_LIBRTE_FSLMC_BUS=y
+
+#
+# Compile NXP DPAA Mempool
+#
+CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
+
+#
+# Compile NXP DPAA2 Mempool
+#
+CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
+
+#
+# Compile bust-oriented NXP DPAA PMD
+#
+CONFIG_RTE_LIBRTE_DPAA_PMD=y
+
+#
+# Compile burst-oriented NXP DPAA2 PMD driver
+#
+CONFIG_RTE_LIBRTE_DPAA2_PMD=y
+
+#
+# Compile schedule-oriented NXP DPAA Event Dev PMD
+#
+CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=y
+
+#
+# Compile schedule-oriented NXP DPAA2 EVENTDEV driver
+#
+CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y
+
+#
+# Compile NXP DPAA caam - crypto driver
+#
+CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y
+CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
+CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048
+
+#
+# Compile NXP DPAA2 crypto sec driver for CAAM HW
+#
+CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y
+CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048
diff --git a/config/defconfig_arm64-dpaa-linuxapp-gcc b/config/defconfig_arm64-dpaa-linuxapp-gcc
index ab9e67d..52bfc79 100644
--- a/config/defconfig_arm64-dpaa-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa-linuxapp-gcc
@@ -19,32 +19,12 @@ CONFIG_RTE_CACHE_LINE_SIZE=64
 CONFIG_RTE_PKTMBUF_HEADROOM=128
 
 # NXP DPAA Bus
-CONFIG_RTE_LIBRTE_DPAA_BUS=y
 CONFIG_RTE_LIBRTE_DPAA_DEBUG_DRIVER=n
 CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
 
-# NXP DPAA Mempool
-CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
-
-# Compile software NXP DPAA PMD
-CONFIG_RTE_LIBRTE_DPAA_PMD=y
-
-# Compile software NXP DPAA Event Dev PMD
-CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=y
-
 #
 # FSL DPAA caam - crypto driver
 #
-CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y
 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n
 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n
 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n
-
-# DPAA CAAM driver instances
-CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
-
-#
-# Number of sessions to create in the session memory pool
-# on a single DPAA SEC device.
-#
-CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048
diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 5d4437c..d4f266a 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -25,18 +25,11 @@ CONFIG_RTE_LIBRTE_VHOST_NUMA=n
 #
 # Compile Support Libraries for DPAA2
 #
-CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
 CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=n
 
 #
-# Compile NXP DPAA2 FSL-MC Bus
-#
-CONFIG_RTE_LIBRTE_FSLMC_BUS=y
-
-#
 # Compile burst-oriented NXP DPAA2 PMD driver
 #
-CONFIG_RTE_LIBRTE_DPAA2_PMD=y
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n
@@ -46,18 +39,6 @@ CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n
 #
 # Compile NXP DPAA2 crypto sec driver for CAAM HW
 #
-CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y
 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n
 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n
 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
-
-#
-# Number of sessions to create in the session memory pool
-# on a single DPAA2 SEC device.
-#
-CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048
-
-#
-# Compile schedule-oriented NXP DPAA2 EVENTDEV driver
-#
-CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y
-- 
2.7.4