[dpdk-dev] [PATCH 13/15] ip_pipeline: add subport config flexibility to TM function

Jasvinder Singh jasvinder.singh at intel.com
Fri Aug 23 16:46:00 CEST 2019


Modify ip pipeline traffic management function to allow different
subports of the same port to have different configuration in terms
of number of pipes, pipe queue sizes, etc.

Signed-off-by: Jasvinder Singh <jasvinder.singh at intel.com>
Signed-off-by: Lukasz Krakowiak <lukaszx.krakowiak at intel.com>
---
 examples/ip_pipeline/cli.c  | 71 ++++++++++++++++++-------------------
 examples/ip_pipeline/tmgr.c | 23 ++++++------
 examples/ip_pipeline/tmgr.h |  7 ++--
 3 files changed, 49 insertions(+), 52 deletions(-)

diff --git a/examples/ip_pipeline/cli.c b/examples/ip_pipeline/cli.c
index c6cf4204e..1e8dc95b4 100644
--- a/examples/ip_pipeline/cli.c
+++ b/examples/ip_pipeline/cli.c
@@ -380,7 +380,12 @@ static const char cmd_tmgr_subport_profile_help[] =
 "   <tc0_rate> <tc1_rate> <tc2_rate> <tc3_rate> <tc4_rate>"
 "        <tc5_rate> <tc6_rate> <tc7_rate> <tc8_rate>"
 "        <tc9_rate> <tc10_rate> <tc11_rate> <tc12_rate>\n"
-"   <tc_period>\n";
+"   <tc_period>\n"
+"   pps <n_pipes_per_subport>\n"
+"   qsize <qsize_tc0> <qsize_tc1> <qsize_tc2>"
+"       <qsize_tc3> <qsize_tc4> <qsize_tc5> <qsize_tc6>"
+"       <qsize_tc7> <qsize_tc8> <qsize_tc9> <qsize_tc10>"
+"       <qsize_tc11> <qsize_tc12>";
 
 static void
 cmd_tmgr_subport_profile(char **tokens,
@@ -391,7 +396,7 @@ cmd_tmgr_subport_profile(char **tokens,
 	struct rte_sched_subport_params p;
 	int status, i;
 
-	if (n_tokens != 19) {
+	if (n_tokens != 35) {
 		snprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);
 		return;
 	}
@@ -417,6 +422,27 @@ cmd_tmgr_subport_profile(char **tokens,
 		return;
 	}
 
+	if (strcmp(tokens[19], "pps") != 0) {
+		snprintf(out, out_size, MSG_ARG_NOT_FOUND, "pps");
+		return;
+	}
+
+	if (parser_read_uint32(&p.n_pipes_per_subport, tokens[20]) != 0) {
+		snprintf(out, out_size, MSG_ARG_INVALID, "n_pipes_per_subport");
+		return;
+	}
+
+	if (strcmp(tokens[21], "qsize") != 0) {
+		snprintf(out, out_size, MSG_ARG_NOT_FOUND, "qsize");
+		return;
+	}
+
+	for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
+		if (parser_read_uint16(&p.qsize[i], tokens[22 + i]) != 0) {
+			snprintf(out, out_size, MSG_ARG_INVALID, "qsize");
+			return;
+		}
+
 	status = tmgr_subport_profile_add(&p);
 	if (status != 0) {
 		snprintf(out, out_size, MSG_CMD_FAIL, tokens[0]);
@@ -491,11 +517,6 @@ static const char cmd_tmgr_help[] =
 "tmgr <tmgr_name>\n"
 "   rate <rate>\n"
 "   spp <n_subports_per_port>\n"
-"   pps <n_pipes_per_subport>\n"
-"   qsize <qsize_tc0> <qsize_tc1> <qsize_tc2>"
-"   <qsize_tc3> <qsize_tc4> <qsize_tc5> <qsize_tc6>"
-"   <qsize_tc7> <qsize_tc8> <qsize_tc9> <qsize_tc10>"
-"   <qsize_tc11> <qsize_tc12>\n"
 "   fo <frame_overhead>\n"
 "   mtu <mtu>\n"
 "   cpu <cpu_id>\n";
@@ -509,9 +530,8 @@ cmd_tmgr(char **tokens,
 	struct tmgr_port_params p;
 	char *name;
 	struct tmgr_port *tmgr_port;
-	int i;
 
-	if (n_tokens != 28) {
+	if (n_tokens != 12) {
 		snprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);
 		return;
 	}
@@ -538,53 +558,32 @@ cmd_tmgr(char **tokens,
 		return;
 	}
 
-	if (strcmp(tokens[6], "pps") != 0) {
-		snprintf(out, out_size, MSG_ARG_NOT_FOUND, "pps");
-		return;
-	}
-
-	if (parser_read_uint32(&p.n_pipes_per_subport, tokens[7]) != 0) {
-		snprintf(out, out_size, MSG_ARG_INVALID, "n_pipes_per_subport");
-		return;
-	}
-
-	if (strcmp(tokens[8], "qsize") != 0) {
-		snprintf(out, out_size, MSG_ARG_NOT_FOUND, "qsize");
-		return;
-	}
-
-	for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
-		if (parser_read_uint16(&p.qsize[i], tokens[9 + i]) != 0) {
-			snprintf(out, out_size, MSG_ARG_INVALID, "qsize");
-			return;
-		}
-
-	if (strcmp(tokens[22], "fo") != 0) {
+	if (strcmp(tokens[6], "fo") != 0) {
 		snprintf(out, out_size, MSG_ARG_NOT_FOUND, "fo");
 		return;
 	}
 
-	if (parser_read_uint32(&p.frame_overhead, tokens[23]) != 0) {
+	if (parser_read_uint32(&p.frame_overhead, tokens[7]) != 0) {
 		snprintf(out, out_size, MSG_ARG_INVALID, "frame_overhead");
 		return;
 	}
 
-	if (strcmp(tokens[24], "mtu") != 0) {
+	if (strcmp(tokens[8], "mtu") != 0) {
 		snprintf(out, out_size, MSG_ARG_NOT_FOUND, "mtu");
 		return;
 	}
 
-	if (parser_read_uint32(&p.mtu, tokens[25]) != 0) {
+	if (parser_read_uint32(&p.mtu, tokens[9]) != 0) {
 		snprintf(out, out_size, MSG_ARG_INVALID, "mtu");
 		return;
 	}
 
-	if (strcmp(tokens[26], "cpu") != 0) {
+	if (strcmp(tokens[10], "cpu") != 0) {
 		snprintf(out, out_size, MSG_ARG_NOT_FOUND, "cpu");
 		return;
 	}
 
-	if (parser_read_uint32(&p.cpu_id, tokens[27]) != 0) {
+	if (parser_read_uint32(&p.cpu_id, tokens[11]) != 0) {
 		snprintf(out, out_size, MSG_ARG_INVALID, "cpu_id");
 		return;
 	}
diff --git a/examples/ip_pipeline/tmgr.c b/examples/ip_pipeline/tmgr.c
index 40cbf1d0a..cafb9cdcc 100644
--- a/examples/ip_pipeline/tmgr.c
+++ b/examples/ip_pipeline/tmgr.c
@@ -47,7 +47,8 @@ int
 tmgr_subport_profile_add(struct rte_sched_subport_params *p)
 {
 	/* Check input params */
-	if (p == NULL)
+	if (p == NULL ||
+		p->n_pipes_per_subport == 0)
 		return -1;
 
 	/* Save profile */
@@ -90,7 +91,6 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params)
 		tmgr_port_find(name) ||
 		(params == NULL) ||
 		(params->n_subports_per_port == 0) ||
-		(params->n_pipes_per_subport == 0) ||
 		(params->cpu_id >= RTE_MAX_NUMA_NODES) ||
 		(n_subport_profiles == 0) ||
 		(n_pipe_profiles == 0))
@@ -103,18 +103,16 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params)
 	p.mtu = params->mtu;
 	p.frame_overhead = params->frame_overhead;
 	p.n_subports_per_port = params->n_subports_per_port;
-	p.n_pipes_per_subport = params->n_pipes_per_subport;
-
-	for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
-		p.qsize[i] = params->qsize[i];
-
-	p.pipe_profiles = pipe_profile;
-	p.n_pipe_profiles = n_pipe_profiles;
+	p.n_max_pipes_per_subport = TMGR_PIPE_SUBPORT_MAX;
+	p.n_max_pipe_profiles = TMGR_PIPE_PROFILE_MAX;
 
 	s = rte_sched_port_config(&p);
 	if (s == NULL)
 		return NULL;
 
+	subport_profile[0].pipe_profiles = pipe_profile;
+	subport_profile[0].n_pipe_profiles = n_pipe_profiles;
+
 	for (i = 0; i < params->n_subports_per_port; i++) {
 		int status;
 
@@ -128,7 +126,7 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params)
 			return NULL;
 		}
 
-		for (j = 0; j < params->n_pipes_per_subport; j++) {
+		for (j = 0; j < subport_profile[0].n_pipes_per_subport; j++) {
 			status = rte_sched_pipe_config(
 				s,
 				i,
@@ -153,7 +151,6 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params)
 	strlcpy(tmgr_port->name, name, sizeof(tmgr_port->name));
 	tmgr_port->s = s;
 	tmgr_port->n_subports_per_port = params->n_subports_per_port;
-	tmgr_port->n_pipes_per_subport = params->n_pipes_per_subport;
 
 	/* Node add to list */
 	TAILQ_INSERT_TAIL(&tmgr_port_list, tmgr_port, node);
@@ -205,8 +202,8 @@ tmgr_pipe_config(const char *port_name,
 	port = tmgr_port_find(port_name);
 	if ((port == NULL) ||
 		(subport_id >= port->n_subports_per_port) ||
-		(pipe_id_first >= port->n_pipes_per_subport) ||
-		(pipe_id_last >= port->n_pipes_per_subport) ||
+		(pipe_id_first >= subport_profile[subport_id].n_pipes_per_subport) ||
+		(pipe_id_last >= subport_profile[subport_id].n_pipes_per_subport) ||
 		(pipe_id_first > pipe_id_last) ||
 		(pipe_profile_id >= n_pipe_profiles))
 		return -1;
diff --git a/examples/ip_pipeline/tmgr.h b/examples/ip_pipeline/tmgr.h
index 8703a2e00..1fcf66ee1 100644
--- a/examples/ip_pipeline/tmgr.h
+++ b/examples/ip_pipeline/tmgr.h
@@ -12,6 +12,10 @@
 
 #include "common.h"
 
+#ifndef TMGR_PIPE_SUBPORT_MAX
+#define TMGR_PIPE_SUBPORT_MAX                              4096
+#endif
+
 #ifndef TMGR_SUBPORT_PROFILE_MAX
 #define TMGR_SUBPORT_PROFILE_MAX                           256
 #endif
@@ -25,7 +29,6 @@ struct tmgr_port {
 	char name[NAME_SIZE];
 	struct rte_sched_port *s;
 	uint32_t n_subports_per_port;
-	uint32_t n_pipes_per_subport;
 };
 
 TAILQ_HEAD(tmgr_port_list, tmgr_port);
@@ -42,8 +45,6 @@ struct tmgr_port_params {
 	uint32_t frame_overhead;
 	uint32_t mtu;
 	uint32_t cpu_id;
-	uint32_t n_pipes_per_subport;
-	uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 };
 
 int
-- 
2.21.0



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