[dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter

Wang, Xiao W xiao.w.wang at intel.com
Mon Jun 17 10:28:00 CEST 2019


Hi Wei,

> -----Original Message-----
> From: Zhao1, Wei
> Sent: Friday, June 14, 2019 5:47 PM
> To: Wang, Xiao W <xiao.w.wang at intel.com>; Yang, Qiming
> <qiming.yang at intel.com>; dev at dpdk.org
> Subject: RE: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter
> 
> Hi, xiao
> 
> > -----Original Message-----
> > From: Wang, Xiao W
> > Sent: Thursday, June 13, 2019 4:24 PM
> > To: Yang, Qiming <qiming.yang at intel.com>; dev at dpdk.org
> > Cc: Zhao1, Wei <wei.zhao1 at intel.com>
> > Subject: RE: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter
> >
> > Hi,
> >
> > > -----Original Message-----
> > > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Qiming Yang
> > > Sent: Wednesday, June 12, 2019 3:50 PM
> > > To: dev at dpdk.org
> > > Cc: Zhao1, Wei <wei.zhao1 at intel.com>
> > > Subject: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter
> > >
> > > From: wei zhao <wei.zhao1 at intel.com>
> > >
> > > The patch enables the backend of rte_flow. It transfers rte_flow_xxx
> > > to device specific data structure and configures packet process
> > > engine's binary classifier
> > > (switch) properly.
> > >
> > > Signed-off-by: Wei Zhao <wei.zhao1 at intel.com>
> > > ---
> > >  drivers/net/ice/Makefile            |   1 +
> > >  drivers/net/ice/ice_ethdev.h        |   6 +
> > >  drivers/net/ice/ice_switch_filter.c | 502
> > > ++++++++++++++++++++++++++++++++++++
> > >  drivers/net/ice/ice_switch_filter.h |  28 ++
> > >  drivers/net/ice/meson.build         |   3 +-
> > >  5 files changed, 539 insertions(+), 1 deletion(-)  create mode 100644
> > > drivers/net/ice/ice_switch_filter.c
> > >  create mode 100644 drivers/net/ice/ice_switch_filter.h
> > >
> > > diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile index
> > > 0e5c55e..b10d826 100644
> > > --- a/drivers/net/ice/Makefile
> > > +++ b/drivers/net/ice/Makefile
> > > @@ -60,6 +60,7 @@ ifeq ($(CONFIG_RTE_ARCH_X86), y)
> > >  SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_rxtx_vec_sse.c  endif
> > >
> > > +SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice_switch_filter.c
> > >  ifeq ($(findstring
> > >
> RTE_MACHINE_CPUFLAG_AVX2,$(CFLAGS)),RTE_MACHINE_CPUFLAG_AVX2)
> > >  	CC_AVX2_SUPPORT=1
> > >  else
> > > diff --git a/drivers/net/ice/ice_ethdev.h
> > > b/drivers/net/ice/ice_ethdev.h index 1385afa..67a358a 100644
> > > --- a/drivers/net/ice/ice_ethdev.h
> > > +++ b/drivers/net/ice/ice_ethdev.h
> > > @@ -234,6 +234,12 @@ struct ice_vsi {
> > >  	bool offset_loaded;
> > >  };
> > >
> > > +/* Struct to store flow created. */
> > > +struct rte_flow {
> > > +	TAILQ_ENTRY(rte_flow) node;
> > > +void *rule;
> > > +};
> > > +
> > >  struct ice_pf {
> > >  	struct ice_adapter *adapter; /* The adapter this PF associate to */
> > >  	struct ice_vsi *main_vsi; /* pointer to main VSI structure */ diff
> > > --git a/drivers/net/ice/ice_switch_filter.c
> > > b/drivers/net/ice/ice_switch_filter.c
> > > new file mode 100644
> > > index 0000000..e679675
> > > --- /dev/null
> > > +++ b/drivers/net/ice/ice_switch_filter.c
[...]

> > > +			RTE_FLOW_ITEM_TYPE_END; item++, i++) {
> >
> > It seems we don't need the "i" variable.
> 
> Ok, Updated in v3
> 
> >
> > > +		item_type = item->type;
> > > +
> > > +		switch (item_type) {
> > > +		case RTE_FLOW_ITEM_TYPE_ETH:
> > > +			eth_spec = item->spec;
> > > +			eth_mask = item->mask;
> > > +			if (eth_spec && eth_mask) {
> > > +				list[t].type = (tun_type == ICE_NON_TUN) ?
> > > +					ICE_MAC_OFOS : ICE_MAC_IL;
> > > +				for (j = 0; j < RTE_ETHER_ADDR_LEN; j++) {
> > > +					if (eth_mask->src.addr_bytes[j] ==
> > > +								UINT8_MAX) {
> > > +						list[t].h_u.eth_hdr.
> > > +							src_addr[j] =
> > > +						eth_spec->src.addr_bytes[j];
> > > +						list[t].m_u.eth_hdr.
> > > +							src_addr[j] =
> > > +						eth_mask->src.addr_bytes[j];
> > > +					}
> > > +					if (eth_mask->dst.addr_bytes[j] ==
> > > +								UINT8_MAX) {
> > > +						list[t].h_u.eth_hdr.
> > > +							dst_addr[j] =
> > > +						eth_spec->dst.addr_bytes[j];
> > > +						list[t].m_u.eth_hdr.
> > > +							dst_addr[j] =
> > > +						eth_mask->dst.addr_bytes[j];
> > > +					}
> > > +				}
> > > +				if (eth_mask->type == UINT16_MAX) {
> > > +					list[t].h_u.eth_hdr.ethtype_id =
> > > +					rte_be_to_cpu_16(eth_spec->type);
> > > +					list[t].m_u.eth_hdr.ethtype_id =
> > > +						UINT16_MAX;
> > > +				}
> > > +				t++;
> >
> > A lot of "t++" below, can we move it outside the switch{ } to have only one
> "t++"?
> 
> By now, we can not, because share code can not handle  if (!eth_spec
> && !eth_mask)  case,  if we t++
> For that case, that item will put into list[t], and share code will report error.

The blow "else if" branch has no effect at all, we can just remove it.

BRs,
Xiao

> >
> > > +			} else if (!eth_spec && !eth_mask) {
> > > +				list[t].type = (tun_type == ICE_NON_TUN) ?
> > > +					ICE_MAC_OFOS : ICE_MAC_IL;
> > > +			}
> > > +			break;
[...]


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