[dpdk-dev] [PATCH v5 3/3] crypto/dpaa2_sec: enable anti replay window config
Hemant Agrawal
hemant.agrawal at nxp.com
Wed Nov 6 06:16:11 CET 2019
Hi Akhil,
> -----Original Message-----
> From: Akhil Goyal <akhil.goyal at nxp.com>
> Sent: Wednesday, November 6, 2019 3:38 AM
> To: Hemant Agrawal <hemant.agrawal at nxp.com>; dev at dpdk.org
> Cc: konstantin.ananyev at intel.com; anoobj at marvell.com; Hemant Agrawal
> <hemant.agrawal at nxp.com>
> Subject: RE: [PATCH v5 3/3] crypto/dpaa2_sec: enable anti replay window
> config
> Importance: High
>
> Hi Hemant,
> >
> > This patch usages the anti replay window size to config the anti
> > replay checking in decap path for lookaside IPSEC offload
> >
> > Signed-off-by: Hemant Agrawal <hemant.agrawal at nxp.com>
> > ---
> > drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 24
> +++++++++++++++++++
> > drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 6 +++--
> > drivers/crypto/dpaa_sec/dpaa_sec.c | 26 +++++++++++++++++++++
> > drivers/crypto/dpaa_sec/dpaa_sec.h | 6 +++--
> > 4 files changed, 58 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > index 52e522e4a..6d59e73e9 100644
> > --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > @@ -2836,6 +2836,30 @@ dpaa2_sec_set_ipsec_session(struct
> > rte_cryptodev *dev,
> > sizeof(struct rte_ipv6_hdr) << 16;
> > if (ipsec_xform->options.esn)
> > decap_pdb.options |= PDBOPTS_ESP_ESN;
> > +
> > + if (ipsec_xform->replay_win_sz) {
> > + uint32_t win_sz;
> > + win_sz = rte_align32pow2(ipsec_xform-
> >replay_win_sz);
> > +
> > + switch (win_sz) {
> > + case 1:
> > + case 2:
> > + case 4:
> > + case 8:
> > + case 16:
> > + case 32:
> > + if (ipsec_xform->options.esn)
> > + decap_pdb.options |=
> > PDBOPTS_ESP_ARS64;
>
> Why is it dependent on ESN?
[Hemant] ESN requires to maintain the > 32 bit seq numbers. So there is no meaning of keeping the windows size as 32 for this case.
>
> > + else
> > + decap_pdb.options |=
> > PDBOPTS_ESP_ARS32;
> > + break;
> > + case 64:
> > + decap_pdb.options |= PDBOPTS_ESP_ARS64;
> > + break;
> > + default:
> > + decap_pdb.options |=
> PDBOPTS_ESP_ARS128;
>
> Default case should not set anti replay window like case 0 when we don't
> want anti replay.
[Hemant] We are choosing to default to 128 bit AR, if the user chooses to set it > 128. It is implementation choice.
>
> > + }
> > + }
> > session->dir = DIR_DEC;
> > bufsize = cnstr_shdsc_ipsec_new_decap(priv-
> >flc_desc[0].desc,
> > 1, 0, SHR_SERIAL,
> > diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
> > b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
> > index 662559422..b97dacbcb 100644
> > --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
> > +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
> > @@ -675,7 +675,8 @@ static const struct rte_security_capability
> > dpaa2_sec_security_cap[] = {
> > .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
> > .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
> > .direction = RTE_SECURITY_IPSEC_SA_DIR_EGRESS,
> > - .options = { 0 }
> > + .options = { 0 },
> > + .replay_win_sz_max = 128
> > },
> > .crypto_capabilities = dpaa2_sec_capabilities
> > },
> > @@ -686,7 +687,8 @@ static const struct rte_security_capability
> > dpaa2_sec_security_cap[] = {
> > .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
> > .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
> > .direction = RTE_SECURITY_IPSEC_SA_DIR_INGRESS,
> > - .options = { 0 }
> > + .options = { 0 },
> > + .replay_win_sz_max = 128
> > },
> > .crypto_capabilities = dpaa2_sec_capabilities
> > },
> > diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c
> > b/drivers/crypto/dpaa_sec/dpaa_sec.c
> > index 6c186338f..7cfa5f6dc 100644
> > --- a/drivers/crypto/dpaa_sec/dpaa_sec.c
> > +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
> > @@ -2693,6 +2693,32 @@ dpaa_sec_set_ipsec_session(__rte_unused
> struct
> > rte_cryptodev *dev,
> > sizeof(struct rte_ipv6_hdr) << 16;
> > if (ipsec_xform->options.esn)
> > session->decap_pdb.options |= PDBOPTS_ESP_ESN;
> > + if (ipsec_xform->replay_win_sz) {
> > + uint32_t win_sz;
> > + win_sz = rte_align32pow2(ipsec_xform-
> >replay_win_sz);
> > +
> > + switch (win_sz) {
> > + case 1:
> > + case 2:
> > + case 4:
> > + case 8:
> > + case 16:
> > + case 32:
> > + if (ipsec_xform->options.esn)
> > + session->decap_pdb.options |=
> > +
> PDBOPTS_ESP_ARS64;
> > + else
> > + session->decap_pdb.options |=
> > +
> PDBOPTS_ESP_ARS32;
> > + break;
> > + case 64:
> > + session->decap_pdb.options |=
> > PDBOPTS_ESP_ARS64;
> > + break;
> > + default:
> > + session->decap_pdb.options |=
> > +
> PDBOPTS_ESP_ARS128;
> > + }
> > + }
> > session->dir = DIR_DEC;
> > } else
> > goto out;
> > diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.h
> > b/drivers/crypto/dpaa_sec/dpaa_sec.h
> > index c10ec1007..684950d6d 100644
> > --- a/drivers/crypto/dpaa_sec/dpaa_sec.h
> > +++ b/drivers/crypto/dpaa_sec/dpaa_sec.h
> > @@ -692,7 +692,8 @@ static const struct rte_security_capability
> > dpaa_sec_security_cap[] = {
> > .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
> > .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
> > .direction = RTE_SECURITY_IPSEC_SA_DIR_EGRESS,
> > - .options = { 0 }
> > + .options = { 0 },
> > + .replay_win_sz_max = 128
> > },
> > .crypto_capabilities = dpaa_sec_capabilities
> > },
> > @@ -703,7 +704,8 @@ static const struct rte_security_capability
> > dpaa_sec_security_cap[] = {
> > .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
> > .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
> > .direction = RTE_SECURITY_IPSEC_SA_DIR_INGRESS,
> > - .options = { 0 }
> > + .options = { 0 },
> > + .replay_win_sz_max = 128
> > },
> > .crypto_capabilities = dpaa_sec_capabilities
> > },
> > --
> > 2.17.1
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