[dpdk-dev] [PATCH v2] net/octeontx2: enable full flow control	for HIGIG
    Jerin Jacob 
    jerinjacobk at gmail.com
       
    Mon Feb  3 10:42:01 CET 2020
    
    
  
On Thu, Jan 30, 2020 at 9:54 PM <kirankumark at marvell.com> wrote:
>
> From: Kiran Kumar K <kirankumark at marvell.com>
>
> When HIGIG flow control enabled with CGX, We are disabling Tx flow control.
> Added check to enable the full flow control in HIGIG mode.
>
> Signed-off-by: Kiran Kumar K <kirankumark at marvell.com>
> ---
> V2 changes:
> * Updated commit log
Updated the commit message to:
    net/octeontx2: fix Tx flow control for HIGIG
    Tx flow controlled is disabled in the Ax silicon version due to an errata.
    This errata is not applicable for HIGIG Tx flow control, therefore
    not enabling in HIGIG case.
    Fixes: 602009ee2dfb ("net/octeontx2: support HIGIG2")
    Cc: stable at dpdk.org
    Signed-off-by: Kiran Kumar K <kirankumark at marvell.com>
Acked-by: Jerin Jacob <jerinj at marvell.com>
Applied to dpdk-next-net-mrvl/master. Thanks
>
>  drivers/net/octeontx2/otx2_flow_ctrl.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c b/drivers/net/octeontx2/otx2_flow_ctrl.c
> index c6d7b1971..1c6929e76 100644
> --- a/drivers/net/octeontx2/otx2_flow_ctrl.c
> +++ b/drivers/net/octeontx2/otx2_flow_ctrl.c
> @@ -213,6 +213,7 @@ otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)
>
>         /* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */
>         if (otx2_dev_is_Ax(dev) &&
> +           (dev->npc_flow.switch_header_type != OTX2_PRIV_FLAGS_HIGIG) &&
>             (fc_conf.mode == RTE_FC_FULL || fc_conf.mode == RTE_FC_RX_PAUSE)) {
>                 fc_conf.mode =
>                                 (fc_conf.mode == RTE_FC_FULL ||
> --
> 2.17.1
>
    
    
More information about the dev
mailing list