[dpdk-dev] [PATCH v2 1/2] eal/arm: fix gcc build for optimization level 0

Ruifeng Wang Ruifeng.Wang at arm.com
Fri Nov 27 14:03:45 CET 2020


> -----Original Message-----
> From: Ruifeng Wang <ruifeng.wang at arm.com>
> Sent: Friday, November 27, 2020 6:15 PM
> To: jerinj at marvell.com; Ruifeng Wang <Ruifeng.Wang at arm.com>;
> Honnappa Nagarahalli <Honnappa.Nagarahalli at arm.com>
> Cc: dev at dpdk.org; nd <nd at arm.com>; Feifei Wang
> <Feifei.Wang2 at arm.com>
> Subject: [PATCH v2 1/2] eal/arm: fix gcc build for optimization level 0
> 
> Gcc build with '-O0' on platforms with RTE_ARM_FEATURE_ATOMICS set
> failed for:
>  ../lib/librte_efd/rte_efd.c
>  Assembler messages:
> 3866: Error: selected processor does not support `crc32cb w0,w0,w1'
> 3890: Error: selected processor does not support `crc32ch w0,w0,w1'
> 3914: Error: selected processor does not support `crc32cw w0,w0,w1'
> 3938: Error: selected processor does not support `crc32cx w0,w0,x1'
> 
> This was caused by an architecture specifier added for Clang.
> Unlike Clang, Gcc considers each inline assembly block to be dependent and
> therefore, the architecture specifier impacts assemble of some blocks
> require certain extension support.
> 
> Used arch_extension instead to not override architecture.
> Referred for [1] to fix the issue.
> 
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i
> d=dd1f6308b28edf0452dd5dc7877992903ec61e69
> 
> Fixes: 8fce34cd0a6a ("eal/arm: fix clang build of native target")
> 
> Reported-by: Feifei Wang <feifei.wang2 at arm.com>
> Signed-off-by: Ruifeng Wang <ruifeng.wang at arm.com>
> ---
> v2:
> New approach to use arch_extension instead.
> 
>  lib/librte_eal/arm/include/rte_atomic_64.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h
> b/lib/librte_eal/arm/include/rte_atomic_64.h
> index 7fcd17466..6584bc38c 100644
> --- a/lib/librte_eal/arm/include/rte_atomic_64.h
> +++ b/lib/librte_eal/arm/include/rte_atomic_64.h
> @@ -46,7 +46,7 @@ rte_atomic_thread_fence(int memorder)
>  /*------------------------ 128 bit atomic operations -------------------------*/
> 
>  #if defined(__ARM_FEATURE_ATOMICS) ||
> defined(RTE_ARM_FEATURE_ATOMICS)
> -#define __LSE_PREAMBLE	".arch armv8-a+lse\n"
> +#define __LSE_PREAMBLE	".arch_extension lse\n"

This approach has issue on earlier version Clang (eg. clang-6).
I think it is better to take approach in v1.
> 
>  #define __ATOMIC128_CAS_OP(cas_op_name, op_string)                          \
>  static __rte_noinline rte_int128_t                                          \
> --
> 2.20.1



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