[dpdk-dev] [PATCH v3 1/2] net: add run-time architecture specific CRC selection
O'loingsigh, Mairtin
mairtin.oloingsigh at intel.com
Tue Oct 6 18:38:39 CEST 2020
Hi,
> -----Original Message-----
> From: Singh, Jasvinder <jasvinder.singh at intel.com>
> Sent: Friday, October 2, 2020 4:18 PM
> To: O'loingsigh, Mairtin <mairtin.oloingsigh at intel.com>; Richardson, Bruce
> <bruce.richardson at intel.com>; De Lara Guarch, Pablo
> <pablo.de.lara.guarch at intel.com>
> Cc: dev at dpdk.org; Ryan, Brendan <brendan.ryan at intel.com>; Coyle, David
> <david.coyle at intel.com>
> Subject: RE: [PATCH v3 1/2] net: add run-time architecture specific CRC
> selection
>
>
>
> > -----Original Message-----
> > From: O'loingsigh, Mairtin <mairtin.oloingsigh at intel.com>
> > Sent: Tuesday, September 29, 2020 4:36 PM
> > To: Singh, Jasvinder <jasvinder.singh at intel.com>; Richardson, Bruce
> > <bruce.richardson at intel.com>; De Lara Guarch, Pablo
> > <pablo.de.lara.guarch at intel.com>
> > Cc: dev at dpdk.org; Ryan, Brendan <brendan.ryan at intel.com>; Coyle,
> David
> > <david.coyle at intel.com>; O'loingsigh, Mairtin
> > <mairtin.oloingsigh at intel.com>
> > Subject: [PATCH v3 1/2] net: add run-time architecture specific CRC
> > selection
> >
> > This patch adds support for run-time selection of the optimal
> > architecture- specific CRC path, based on the supported instruction set(s)
> of the CPU.
> >
> > The compiler option checks have been moved from the C files to the
> > meson script. The rte_cpu_get_flag_enabled function is called
> > automatically by the library at process initialization time to
> > determine which instructions the CPU supports, with the most optimal
> supported CRC path ultimately selected.
> >
> > Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh at intel.com>
> > Signed-off-by: David Coyle <david.coyle at intel.com>
> > ---
> > doc/guides/rel_notes/release_20_11.rst | 4 ++
> > lib/librte_net/meson.build | 34 +++++++++++-
> > lib/librte_net/net_crc.h | 34 ++++++++++++
> > lib/librte_net/{net_crc_neon.h => net_crc_neon.c} | 27 +++------
> > lib/librte_net/{net_crc_sse.h => net_crc_sse.c} | 34 ++++--------
> > lib/librte_net/rte_net_crc.c | 67 ++++++++++++++---------
> > 6 files changed, 132 insertions(+), 68 deletions(-) create mode
> > 100644 lib/librte_net/net_crc.h rename lib/librte_net/{net_crc_neon.h
> > => net_crc_neon.c} (95%) rename lib/librte_net/{net_crc_sse.h =>
> > net_crc_sse.c} (94%)
> >
> > diff --git a/doc/guides/rel_notes/release_20_11.rst
> > b/doc/guides/rel_notes/release_20_11.rst
> > index 4eb3224a7..6bd222dca 100644
> > --- a/doc/guides/rel_notes/release_20_11.rst
> > +++ b/doc/guides/rel_notes/release_20_11.rst
> > @@ -55,6 +55,10 @@ New Features
> > Also, make sure to start the actual text at the margin.
> > =======================================================
>
> <snip>
>
>
> _t *data, uint32_t data_len);
> > +
> > +#endif /* _NET_CRC_H_ */
> > diff --git a/lib/librte_net/net_crc_neon.h
> > b/lib/librte_net/net_crc_neon.c similarity index 95% rename from
> > lib/librte_net/net_crc_neon.h rename to lib/librte_net/net_crc_neon.c
> > index 63fa1d4a1..b79684ec2 100644
> > --- a/lib/librte_net/net_crc_neon.h
> > +++ b/lib/librte_net/net_crc_neon.c
> > @@ -1,18 +1,17 @@
> > /* SPDX-License-Identifier: BSD-3-Clause
> > * Copyright(c) 2017 Cavium, Inc
> > + * Copyright(c) 2020 Intel Corporation
> > */
>
> Could you please remove intel copyright as there is no change in this file?
>
> > -#ifndef _NET_CRC_NEON_H_
> > -#define _NET_CRC_NEON_H_
> > +#include <string.h>
> >
> > +#include <rte_common.h>
> > #include <rte_branch_prediction.h>
> > #include <rte_net_crc.h>
> > #include <rte_vect.h>
> > #include <rte_cpuflags.h>
> >
> > -#ifdef __cplusplus
> > -extern "C" {
> > -#endif
> > +#include "net_crc.h"
> >
> > /** PMULL CRC computation context structure */ struct crc_pmull_ctx
> > { @@
> > -218,7 +217,7 @@ crc32_eth_calc_pmull(
> > return n;
> > }
> >
> > -static inline void
> > +void
> > rte_net_crc_neon_init(void)
> > {
> > /* Initialize CRC16 data */
> > @@ -242,9 +241,8 @@ rte_net_crc_neon_init(void)
> > crc32_eth_pmull.rk7_rk8 = vld1q_u64(eth_k7_k8); }
> >
> > -static inline uint32_t
> > -rte_crc16_ccitt_neon_handler(const uint8_t *data,
> > - uint32_t data_len)
> > +uint32_t
> > +rte_crc16_ccitt_neon_handler(const uint8_t *data, uint32_t data_len)
> > {
> > return (uint16_t)~crc32_eth_calc_pmull(data,
> > data_len,
> > @@ -252,18 +250,11 @@ rte_crc16_ccitt_neon_handler(const uint8_t
> *data,
> > &crc16_ccitt_pmull);
> > }
> >
> > -static inline uint32_t
> > -rte_crc32_eth_neon_handler(const uint8_t *data,
> > - uint32_t data_len)
> > +uint32_t
> > +rte_crc32_eth_neon_handler(const uint8_t *data, uint32_t data_len)
> > {
> > return ~crc32_eth_calc_pmull(data,
> > data_len,
> > 0xffffffffUL,
> > &crc32_eth_pmull);
> > }
> > -
> > -#ifdef __cplusplus
> > -}
> > -#endif
> > -
> > -#endif /* _NET_CRC_NEON_H_ */
> > diff --git a/lib/librte_net/net_crc_sse.h
> > b/lib/librte_net/net_crc_sse.c similarity index 94% rename from
> > lib/librte_net/net_crc_sse.h rename to lib/librte_net/net_crc_sse.c
> > index 1c7b7a548..053b54b39 100644
> > --- a/lib/librte_net/net_crc_sse.h
> > +++ b/lib/librte_net/net_crc_sse.c
> > @@ -1,18 +1,16 @@
> > /* SPDX-License-Identifier: BSD-3-Clause
> > - * Copyright(c) 2017 Intel Corporation
> > + * Copyright(c) 2017-2020 Intel Corporation
> > */
> >
> > -#ifndef _RTE_NET_CRC_SSE_H_
> > -#define _RTE_NET_CRC_SSE_H_
> > +#include <string.h>
> >
> > +#include <rte_common.h>
> > #include <rte_branch_prediction.h>
> > +#include <rte_cpuflags.h>
> >
> > -#include <x86intrin.h>
> > -#include <cpuid.h>
> > +#include "net_crc.h"
> >
> > -#ifdef __cplusplus
> > -extern "C" {
> > -#endif
> > +#include <x86intrin.h>
> >
> > /** PCLMULQDQ CRC computation context structure */ struct
> > crc_pclmulqdq_ctx { @@ -259,8 +257,7 @@ crc32_eth_calc_pclmulqdq(
> > return n;
> > }
> >
> > -
> > -static inline void
> > +void
> > rte_net_crc_sse42_init(void)
> > {
> > uint64_t k1, k2, k5, k6;
> > @@ -303,12 +300,10 @@ rte_net_crc_sse42_init(void)
> > * use other data types such as float, double, etc.
> > */
> > _mm_empty();
> > -
> > }
> >
> > -static inline uint32_t
> > -rte_crc16_ccitt_sse42_handler(const uint8_t *data,
> > - uint32_t data_len)
> > +uint32_t
> > +rte_crc16_ccitt_sse42_handler(const uint8_t *data, uint32_t data_len)
> > {
> > /** return 16-bit CRC value */
> > return (uint16_t)~crc32_eth_calc_pclmulqdq(data,
> > @@ -317,18 +312,11 @@ rte_crc16_ccitt_sse42_handler(const uint8_t
> > *data,
> > &crc16_ccitt_pclmulqdq);
> > }
> >
> > -static inline uint32_t
> > -rte_crc32_eth_sse42_handler(const uint8_t *data,
> > - uint32_t data_len)
> > +uint32_t
> > +rte_crc32_eth_sse42_handler(const uint8_t *data, uint32_t data_len)
> > {
> > return ~crc32_eth_calc_pclmulqdq(data,
> > data_len,
> > 0xffffffffUL,
> > &crc32_eth_pclmulqdq);
> > }
> > -
> > -#ifdef __cplusplus
> > -}
> > -#endif
> > -
> > -#endif /* _RTE_NET_CRC_SSE_H_ */
> > diff --git a/lib/librte_net/rte_net_crc.c
> > b/lib/librte_net/rte_net_crc.c index 4f5b9e828..83dccbfba 100644
> > --- a/lib/librte_net/rte_net_crc.c
> > +++ b/lib/librte_net/rte_net_crc.c
> > @@ -1,5 +1,5 @@
> > /* SPDX-License-Identifier: BSD-3-Clause
> > - * Copyright(c) 2017 Intel Corporation
> > + * Copyright(c) 2017-2020 Intel Corporation
> > */
> >
> > #include <stddef.h>
> > @@ -10,17 +10,7 @@
> > #include <rte_common.h>
> > #include <rte_net_crc.h>
> >
> > -#if defined(RTE_ARCH_X86_64) && defined(__PCLMUL__)
> > -#define X86_64_SSE42_PCLMULQDQ 1
> > -#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRYPTO)
> > -#define ARM64_NEON_PMULL 1
> > -#endif
> > -
> > -#ifdef X86_64_SSE42_PCLMULQDQ
> > -#include <net_crc_sse.h>
> > -#elif defined ARM64_NEON_PMULL
> > -#include <net_crc_neon.h>
> > -#endif
> > +#include "net_crc.h"
> >
> > /** CRC polynomials */
> > #define CRC32_ETH_POLYNOMIAL 0x04c11db7UL @@ -47,13 +37,13 @@
> static
> > rte_net_crc_handler handlers_scalar[] = {
> > [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_handler,
> > [RTE_NET_CRC32_ETH] = rte_crc32_eth_handler, };
> > -
> > -#ifdef X86_64_SSE42_PCLMULQDQ
> > +#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
> > static rte_net_crc_handler handlers_sse42[] = {
> > [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_sse42_handler,
> > [RTE_NET_CRC32_ETH] = rte_crc32_eth_sse42_handler, }; -#elif
> > defined ARM64_NEON_PMULL
> > +#endif
> > +#ifdef CC_ARM64_NEON_PMULL_SUPPORT
> > static rte_net_crc_handler handlers_neon[] = {
> > [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_neon_handler,
> > [RTE_NET_CRC32_ETH] = rte_crc32_eth_neon_handler, @@ -142,22
> > +132,44 @@ rte_crc32_eth_handler(const uint8_t *data, uint32_t
> > +data_len)
> > crc32_eth_lut);
> > }
> >
> > +#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT static uint8_t
> > +sse42_pclmulqdq_cpu_supported(void)
> > +{
> > + return rte_cpu_get_flag_enabled(RTE_CPUFLAG_PCLMULQDQ);
> > +}
> > +#endif
> > +
> > +#ifdef CC_ARM64_NEON_PMULL_SUPPORT
> > +static uint8_t
> > +neon_pmull_cpu_supported(void)
> > +{
> > + return rte_cpu_get_flag_enabled(RTE_CPUFLAG_PMULL);
> > +}
> > +#endif
> > +
> > void
> > rte_net_crc_set_alg(enum rte_net_crc_alg alg) {
> > switch (alg) {
> > -#ifdef X86_64_SSE42_PCLMULQDQ
> > +#ifdef RTE_ARCH_X86_64
> > case RTE_NET_CRC_SSE42:
> > - handlers = handlers_sse42;
> > - break;
> > -#elif defined ARM64_NEON_PMULL
> > - /* fall-through */
> > +#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
> > + if (sse42_pclmulqdq_cpu_supported()) {
> > + handlers = handlers_sse42;
> > + break;
> > + }
> > +#endif
> > +#endif /* RTE_ARCH_X86_64 */
> > +#ifdef RTE_ARCH_ARM64
> > case RTE_NET_CRC_NEON:
> > - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_PMULL)) {
> > +#ifdef CC_ARM64_NEON_PMULL_SUPPORT
> > + if (neon_pmull_cpu_supported()) {
> > handlers = handlers_neon;
> > break;
> > }
> > #endif
> > +#endif /* RTE_ARCH_ARM64 */
> > /* fall-through */
> > case RTE_NET_CRC_SCALAR:
> > /* fall-through */
> > @@ -188,11 +200,14 @@ RTE_INIT(rte_net_crc_init)
> >
> > rte_net_crc_scalar_init();
> >
> > -#ifdef X86_64_SSE42_PCLMULQDQ
> > - alg = RTE_NET_CRC_SSE42;
> > - rte_net_crc_sse42_init();
> > -#elif defined ARM64_NEON_PMULL
> > - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_PMULL)) {
> > +#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
> > + if (sse42_pclmulqdq_cpu_supported()) {
> > + alg = RTE_NET_CRC_SSE42;
> > + rte_net_crc_sse42_init();
> > + }
> > +#endif
> > +#ifdef CC_ARM64_NEON_PMULL_SUPPORT
> > + if (neon_pmull_cpu_supported()) {
> > alg = RTE_NET_CRC_NEON;
> > rte_net_crc_neon_init();
> > }
> > --
> > 2.12.3
>
> Patch looks good to me except the one stated above.
>
>
Fix for above comment on copyright has been applied to v4 patch which was just submitted
Regards,
Mairtin
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