[dpdk-dev] [PATCH v5 1/2] net: add run-time architecture specific CRC selection

Bruce Richardson bruce.richardson at intel.com
Tue Oct 13 11:07:08 CEST 2020


On Fri, Oct 09, 2020 at 02:50:44PM +0100, Mairtin o Loingsigh wrote:
> This patch adds support for run-time selection of the optimal
> architecture-specific CRC path, based on the supported instruction set(s)
> of the CPU.
> 
> The compiler option checks have been moved from the C files to the meson
> script. The rte_cpu_get_flag_enabled function is called automatically by
> the library at process initialization time to determine which
> instructions the CPU supports, with the most optimal supported CRC path
> ultimately selected.
> 
> Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh at intel.com>
> Signed-off-by: David Coyle <david.coyle at intel.com>
> Acked-by: Konstantin Ananyev <konstantin.ananyev at intel.com>
> ---
>  doc/guides/rel_notes/release_20_11.rst            |   4 +
>  lib/librte_net/meson.build                        |  34 ++++++-
>  lib/librte_net/net_crc.h                          |  34 +++++++
>  lib/librte_net/{net_crc_neon.h => net_crc_neon.c} |  26 ++---
>  lib/librte_net/{net_crc_sse.h => net_crc_sse.c}   |  34 ++-----
>  lib/librte_net/rte_net_crc.c                      | 116 +++++++++++++++-------
>  6 files changed, 168 insertions(+), 80 deletions(-)
>  create mode 100644 lib/librte_net/net_crc.h
>  rename lib/librte_net/{net_crc_neon.h => net_crc_neon.c} (95%)
>  rename lib/librte_net/{net_crc_sse.h => net_crc_sse.c} (94%)
> 
> diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst
> index 808bdc4e5..b77297f7e 100644
> --- a/doc/guides/rel_notes/release_20_11.rst
> +++ b/doc/guides/rel_notes/release_20_11.rst
> @@ -55,6 +55,10 @@ New Features
>       Also, make sure to start the actual text at the margin.
>       =======================================================
>  
> +* **Updated CRC modules of rte_net library.**
> +
> +  * Added run-time selection of the optimal architecture-specific CRC path.
> +
>  * **Updated Broadcom bnxt driver.**
>  
>    Updated the Broadcom bnxt driver with new features and improvements, including:
> diff --git a/lib/librte_net/meson.build b/lib/librte_net/meson.build
> index 24ed8253b..fa439b9e5 100644
> --- a/lib/librte_net/meson.build
> +++ b/lib/librte_net/meson.build
> @@ -1,5 +1,5 @@
>  # SPDX-License-Identifier: BSD-3-Clause
> -# Copyright(c) 2017 Intel Corporation
> +# Copyright(c) 2017-2020 Intel Corporation
>  
>  headers = files('rte_ip.h',
>  	'rte_tcp.h',
> @@ -20,3 +20,35 @@ headers = files('rte_ip.h',
>  
>  sources = files('rte_arp.c', 'rte_ether.c', 'rte_net.c', 'rte_net_crc.c')
>  deps += ['mbuf']
> +
> +if dpdk_conf.has('RTE_ARCH_X86_64')
> +	net_crc_sse42_cpu_support = (
> +		cc.get_define('__PCLMUL__', args: machine_args) != '')
> +	net_crc_sse42_cc_support = (
> +		cc.has_argument('-mpclmul') and cc.has_argument('-maes'))
> +
> +	build_static_net_crc_sse42_lib = 0
> +
> +	if net_crc_sse42_cpu_support == true
> +		sources += files('net_crc_sse.c')
> +		cflags += ['-DCC_X86_64_SSE42_PCLMULQDQ_SUPPORT']
> +	elif net_crc_sse42_cc_support == true
> +		build_static_net_crc_sse42_lib = 1
> +		net_crc_sse42_lib_cflags = ['-mpclmul', '-maes']
> +		cflags += ['-DCC_X86_64_SSE42_PCLMULQDQ_SUPPORT']
> +	endif
> +
> +	if build_static_net_crc_sse42_lib == 1
> +		net_crc_sse42_lib = static_library(
> +					'net_crc_sse42_lib',
> +					'net_crc_sse.c',
> +					dependencies: static_rte_eal,
> +					c_args: [cflags,
> +						net_crc_sse42_lib_cflags])
> +		objs += net_crc_sse42_lib.extract_objects('net_crc_sse.c')
> +	endif
> +elif (dpdk_conf.has('RTE_ARCH_ARM64') and
> +		cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != '')
> +	sources += files('net_crc_neon.c')
> +	cflags += ['-DCC_ARM64_NEON_PMULL_SUPPORT']
> +endif

This meson code looks ok to me. Not sure you needed the variable for
"net_crc_sse42_lib_cflags", but generally looks good.

Acked-by: Bruce Richardson <bruce.richadson at intel.com>


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