[dpdk-dev] [PATCH v3 1/3] bus/pci: enable PCI master in command register

David Marchand david.marchand at redhat.com
Tue Apr 27 11:28:31 CEST 2021


On Fri, Apr 23, 2021 at 2:06 PM Haiyue Wang <haiyue.wang at intel.com> wrote:
> diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
> index 64886b473..83caf477b 100644
> --- a/drivers/bus/pci/rte_bus_pci.h
> +++ b/drivers/bus/pci/rte_bus_pci.h
> @@ -249,6 +249,18 @@ void rte_pci_dump(FILE *f);
>  __rte_experimental
>  off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap);
>
> +/**
> + * Enables Bus Master for device's PCI command register.
> + *
> + *  @param dev
> + *    A pointer to rte_pci_device structure.
> + *
> + *  @return
> + *  0 on success, -1 on error in PCI config space read/write.
> + */
> +__rte_experimental
> +int rte_pci_enable_bus_master(struct rte_pci_device *dev);

I can see pci/vfio and net/hns3 has a similar helper to enable *and*
disable bus master.

I'd rather go with a "set" helper, and then we can clean existing
drivers who had their own helper:
drivers/bus/pci/linux/pci_uio.c
drivers/bus/pci/linux/pci_vfio.c
drivers/net/hns3/hns3_ethdev_vf.c


> +
>  /**
>   * Register a PCI driver.
>   *
> diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map
> index f33ed0abd..9dbec12a0 100644
> --- a/drivers/bus/pci/version.map
> +++ b/drivers/bus/pci/version.map
> @@ -21,4 +21,7 @@ EXPERIMENTAL {
>         global:
>
>         rte_pci_find_ext_capability;
> +
> +       # added in 21.05
> +       rte_pci_enable_bus_master;
>  };
> diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> index a8f8e404a..1f33d687f 100644
> --- a/lib/pci/rte_pci.h
> +++ b/lib/pci/rte_pci.h
> @@ -32,6 +32,10 @@ extern "C" {
>
>  #define RTE_PCI_VENDOR_ID      0x00    /* 16 bits */
>  #define RTE_PCI_DEVICE_ID      0x02    /* 16 bits */
> +#define RTE_PCI_COMMAND                0x04    /* 16 bits */

This file uses tab for indent.


> +
> +/* PCI Command Register */
> +#define RTE_PCI_COMMAND_MASTER 0x4     /* Bus Master Enable */
>
>  /* PCI Express capability registers */
>  #define RTE_PCI_EXP_DEVCTL     8       /* Device Control */
> --
> 2.31.1
>


-- 
David Marchand



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