[dpdk-dev] [PATCH v6 1/2] net/mlx5: support matching on the reserved field of VXLAN
Rongwei Liu
rongweil at nvidia.com
Tue Jul 13 13:49:10 CEST 2021
Hi Raslan:
Starting feom v5, rebase is already done.
Do we have new conflicts now?
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________________________________
发件人: Raslan Darawsheh <rasland at nvidia.com>
发送时间: Tuesday, July 13, 2021 7:40:37 PM
收件人: Rongwei Liu <rongweil at nvidia.com>; Matan Azrad <matan at nvidia.com>; Slava Ovsiienko <viacheslavo at nvidia.com>; Ori Kam <orika at nvidia.com>; NBU-Contact-Thomas Monjalon <thomas at monjalon.net>; Shahaf Shuler <shahafs at nvidia.com>
抄送: dev at dpdk.org <dev at dpdk.org>
主题: RE: [PATCH v6 1/2] net/mlx5: support matching on the reserved field of VXLAN
Hi,
> -----Original Message-----
> From: Rongwei Liu <rongweil at nvidia.com>
> Sent: Tuesday, July 13, 2021 1:50 PM
> To: Matan Azrad <matan at nvidia.com>; Slava Ovsiienko
> <viacheslavo at nvidia.com>; Ori Kam <orika at nvidia.com>; NBU-Contact-
> Thomas Monjalon <thomas at monjalon.net>; Shahaf Shuler
> <shahafs at nvidia.com>
> Cc: dev at dpdk.org; Raslan Darawsheh <rasland at nvidia.com>
> Subject: [PATCH v6 1/2] net/mlx5: support matching on the reserved field of
> VXLAN
>
> This adds matching on the reserved field of VXLAN
> header (the last 8-bits). The capability from rdma-core
> is detected by creating a dummy matcher using misc5
> when the device is probed.
>
> For non-zero groups and FDB domain, the capability is
> detected from rdma-core, meanwhile for NIC domain group
> zero it's relying on the HCA_CAP from FW.
>
> Signed-off-by: Rongwei Liu <rongweil at nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
> ---
> doc/guides/nics/mlx5.rst | 11 +-
> doc/guides/rel_notes/release_21_08.rst | 6 +
> drivers/common/mlx5/mlx5_devx_cmds.c | 3 +
> drivers/common/mlx5/mlx5_devx_cmds.h | 6 +
> drivers/common/mlx5/mlx5_prm.h | 41 +++++--
> drivers/net/mlx5/linux/mlx5_os.c | 77 ++++++++++++
> drivers/net/mlx5/mlx5.h | 2 +
> drivers/net/mlx5/mlx5_flow.c | 26 +++-
> drivers/net/mlx5/mlx5_flow.h | 4 +-
> drivers/net/mlx5/mlx5_flow_dv.c | 160 +++++++++++++++++--------
> drivers/net/mlx5/mlx5_flow_verbs.c | 3 +-
> drivers/vdpa/mlx5/mlx5_vdpa_steer.c | 6 +-
> 12 files changed, 280 insertions(+), 65 deletions(-)
>
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index 8253b96e92..5842991d5d 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -195,8 +195,15 @@ Limitations
> size and ``txq_inline_min`` settings and may be from 2 (worst case forced
> by maximal
> inline settings) to 58.
>
> -- Flows with a VXLAN Network Identifier equal (or ends to be equal)
> - to 0 are not supported.
> +- Match on VXLAN supports the following fields only:
> +
> + - VNI
> + - Last reserved 8-bits
> +
> + Last reserved 8-bits matching is only supported When using DV flow
> + engine (``dv_flow_en`` = 1).
> + Group zero's behavior may differ which depends on FW.
> + Matching value equals 0 (value & mask) is not supported.
>
> - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with
> MPLSoGRE and MPLSoUDP.
>
> diff --git a/doc/guides/rel_notes/release_21_08.rst
> b/doc/guides/rel_notes/release_21_08.rst
> index 6a902ef9ac..3fb17bbf77 100644
> --- a/doc/guides/rel_notes/release_21_08.rst
> +++ b/doc/guides/rel_notes/release_21_08.rst
> @@ -117,6 +117,11 @@ New Features
> The experimental PMD power management API now supports managing
> multiple Ethernet Rx queues per lcore.
>
> +* **Updated Mellanox mlx5 driver.**
> +
> + Updated the Mellanox mlx5 driver with new features and improvements,
> including:
> +
> + * Added support for matching on vxlan header last 8-bits reserved field.
>
I guess this need to be rebased which is what Andrew mentioned in his previous comment,
Otherwise,
Acked-by: Raslan Darawsheh <rasland at nvidia.com>
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