[dpdk-dev] [PATCH v3] pflock: implementation of phase-fair reader writer locks

[Stephen Hemminger]

On Tue, 30 Mar 2021 00:18:40 +0000
Honnappa Nagarahalli <Honnappa.Nagarahalli at arm.com> wrote:

> > That won't work because the implementation of trylock requires
> > compare/exchange of the whole structure as an atomic operation.  
> I meant, placing 'rd' and 'wr' on separate cache lines. It might help in the reader-writer contention case.

Except ARM default cache size is 128 which makes these locks rather large.
The reader is the hot case and it doesn't look at the writer part.