[dpdk-dev] [PATCH 2/2] net/bnxt: fix Rx FIFO pending bit
Ajit Khaparde
ajit.khaparde at broadcom.com
Mon May 3 00:31:19 CEST 2021
On Sun, Apr 25, 2021 at 11:09 PM Somnath Kotur <somnath.kotur at broadcom.com>
wrote:
> Fix to clear the Rx FIFO while reading the timestamp.
> If the Rx FIFO has pending bit set, keep reading to clear it
> and return the last valid timestamp instead of unconditionally
> returning an error.
>
> Fixes: b11cceb83a34 ("net/bnxt: support timesync")
> Cc: stable at dpdk.org
>
> Signed-off-by: Somnath Kotur <somnath.kotur at broadcom.com>
> Reviewed-by: Ajit Khaparde <ajit.khaparde at broadcom.com>
>
Patch applied to dpdk-next-net-brcm. Thanks
> ---
> drivers/net/bnxt/bnxt.h | 1 +
> drivers/net/bnxt/bnxt_ethdev.c | 38 ++++++++++++++++++++++++++++++----
> 2 files changed, 35 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
> index dfdfa9f7a0..8f3ae41911 100644
> --- a/drivers/net/bnxt/bnxt.h
> +++ b/drivers/net/bnxt/bnxt.h
> @@ -306,6 +306,7 @@ struct rte_flow {
> struct bnxt_vnic_info *vnic;
> };
>
> +#define BNXT_PTP_RX_PND_CNT 10
> #define BNXT_PTP_FLAGS_PATH_TX 0x0
> #define BNXT_PTP_FLAGS_PATH_RX 0x1
> #define BNXT_PTP_FLAGS_CURRENT_TIME 0x2
> diff --git a/drivers/net/bnxt/bnxt_ethdev.c
> b/drivers/net/bnxt/bnxt_ethdev.c
> index f5d2dc8590..eb81bf3991 100644
> --- a/drivers/net/bnxt/bnxt_ethdev.c
> +++ b/drivers/net/bnxt/bnxt_ethdev.c
> @@ -3388,6 +3388,38 @@ static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t
> *ts)
> return 0;
> }
>
> +static int bnxt_clr_rx_ts(struct bnxt *bp, uint64_t *last_ts)
> +{
> + struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
> + struct bnxt_pf_info *pf = bp->pf;
> + uint16_t port_id;
> + int i = 0;
> + uint32_t fifo;
> +
> + if (!ptp || (bp->flags & BNXT_FLAG_CHIP_P5))
> + return -EINVAL;
> +
> + port_id = pf->port_id;
> + fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
> + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
> + while ((fifo & BNXT_PTP_RX_FIFO_PENDING) && (i <
> BNXT_PTP_RX_PND_CNT)) {
> + rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
> + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]);
> + fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
> +
> ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
> + *last_ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0
> +
> +
> ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
> + *last_ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t
> *)bp->bar0 +
> +
> ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
> + i++;
> + }
> +
> + if (i >= BNXT_PTP_RX_PND_CNT)
> + return -EBUSY;
> +
> + return 0;
> +}
> +
> static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
> {
> struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
> @@ -3406,10 +3438,8 @@ static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t
> *ts)
>
> fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
> ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
> - if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
> -/* bnxt_clr_rx_ts(bp); TBD */
> - return -EBUSY;
> - }
> + if (fifo & BNXT_PTP_RX_FIFO_PENDING)
> + return bnxt_clr_rx_ts(bp, ts);
>
> *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
> ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
> --
> 2.28.0.497.g54e85e7
>
>
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