[dpdk-dev] [PATCH v2] net/iavf: fix QFI field bit check for GTPU EH

Zhang, Qi Z qi.z.zhang at intel.com
Thu Oct 7 06:24:00 CEST 2021


> -----Original Message-----
> From: Guo, Junfeng <junfeng.guo at intel.com>
> Sent: Wednesday, September 29, 2021 8:32 PM
> To: Zhang, Qi Z <qi.z.zhang at intel.com>; Wu, Jingjing <jingjing.wu at intel.com>;
> Xing, Beilei <beilei.xing at intel.com>
> Cc: dev at dpdk.org; stable at dpdk.org; Yigit, Ferruh <ferruh.yigit at intel.com>;
> Guo, Junfeng <junfeng.guo at intel.com>; Liu, Lingyu <lingyu.liu at intel.com>
> Subject: [PATCH v2] net/iavf: fix QFI field bit check for GTPU EH
> 
> If GTPU Extionsion header has no pdu_type setting, the parsed value of
> gtp_psc_spec->pdu_type will be 0, which is same as IAVF_GTPU_EH_DWLINK.
> Thus, for this case, we should check gtp_psc_mask->pdu_type instead, to set
> QFI field bit of GTPU_EH first.
> 
> Fixes: 45cc3a5435fc ("net/iavf: fix QFI fields of GTPU UL/DL for FDIR")
> Cc: stable at dpdk.org
> 
> Signed-off-by: Junfeng Guo <junfeng.guo at intel.com>


The patch can't be applied due to below commit

commit 16b8e92d49b87705fffbedd9c3241204d9a584a6
Author: Raslan Darawsheh <rasland at nvidia.com>
Date:   Mon Aug 23 13:55:39 2021 +0300

    ethdev: use extension header for GTP PSC item

    This updates the gtp_psc flow item to use the net header
    definition of the gtp_psc to be based on RFC 38415-g30

    Signed-off-by: Raslan Darawsheh <rasland at nvidia.com>
    Acked-by: Ferruh Yigit <ferruh.yigit at intel.com>

Could you rebase?

Thanks
Qi

> ---
>  drivers/net/iavf/iavf_fdir.c | 12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c index
> 560589a496..227a089ce0 100644
> --- a/drivers/net/iavf/iavf_fdir.c
> +++ b/drivers/net/iavf/iavf_fdir.c
> @@ -1171,17 +1171,15 @@ iavf_fdir_parse_pattern(__rte_unused struct
> iavf_adapter *ad,
>  			if (gtp_psc_spec && gtp_psc_mask) {
>  				if (gtp_psc_mask->qfi == UINT8_MAX) {
>  					input_set |= IAVF_INSET_GTPU_QFI;
> -					if (gtp_psc_spec->pdu_type ==
> -								IAVF_GTPU_EH_UPLINK)
> +					if (!gtp_psc_mask->pdu_type)
>  						VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
> -										 GTPU_UP, QFI);
> -					else if (gtp_psc_spec->pdu_type ==
> -								IAVF_GTPU_EH_DWLINK)
> +										 GTPU_EH, QFI);
> +					else if (gtp_psc_spec->pdu_type ==
> IAVF_GTPU_EH_DWLINK)
>  						VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
>  										 GTPU_DWN, QFI);
> -					else
> +					else if (gtp_psc_spec->pdu_type ==
> IAVF_GTPU_EH_UPLINK)
>  						VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
> -										 GTPU_EH, QFI);
> +										 GTPU_UP, QFI);
>  				}
> 
>  				rte_memcpy(hdr->buffer, gtp_psc_spec,
> --
> 2.25.1



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