[PATCH] ixgbe: fix interrupt clear mask for eimc register

[Simon Ellmann]

32nd bit of the eimc register is reserved according to the datasheet

Signed-off-by: Simon Ellmann <simon.ellmann at tum.de>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 1094df5891..03b299cd10 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -2023,7 +2023,7 @@ enum {
 #define IXGBE_FTQF_QUEUE_ENABLE		0x80000000
 
 /* Interrupt clear mask */
-#define IXGBE_IRQ_CLEAR_MASK	0xFFFFFFFF
+#define IXGBE_IRQ_CLEAR_MASK	0x7FFFFFFF
 
 /* Interrupt Vector Allocation Registers */
 #define IXGBE_IVAR_REG_NUM		25
-- 
2.43.0