[PATCH] pipeline: increase the pipeline instruction table size

Harshad Narayane harshad.suresh.narayane at intel.com
Wed Feb 1 08:58:57 CET 2023


The complex P4 programs requires more custom instructions, therefore
we increase the pipeline instruction table size from 256 to 1024.

Signed-off-by: Harshad Narayane <harshad.suresh.narayane at intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r at intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu at intel.com>
---
 lib/pipeline/rte_swx_pipeline_internal.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h
index 335506039b..345b32502c 100644
--- a/lib/pipeline/rte_swx_pipeline_internal.h
+++ b/lib/pipeline/rte_swx_pipeline_internal.h
@@ -1465,7 +1465,7 @@ instr_operand_nbo(struct thread *t, const struct instr_operand *x)
 #endif
 
 #ifndef RTE_SWX_PIPELINE_INSTRUCTION_TABLE_SIZE_MAX
-#define RTE_SWX_PIPELINE_INSTRUCTION_TABLE_SIZE_MAX 256
+#define RTE_SWX_PIPELINE_INSTRUCTION_TABLE_SIZE_MAX 1024
 #endif
 
 struct rte_swx_pipeline {
-- 
2.34.1



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