[PATCH 4/4] net/mlx5: define index register for linear tables

[Slava Ovsiienko]

> -----Original Message-----
> From: Alexander Kozyrev <akozyrev at nvidia.com>
> Sent: пятница, 27 января 2023 г. 01:41
> To: dev at dpdk.org
> Cc: NBU-Contact-Thomas Monjalon (EXTERNAL) <thomas at monjalon.net>; Ori
> Kam <orika at nvidia.com>; Raslan Darawsheh <rasland at nvidia.com>; Matan
> Azrad <matan at nvidia.com>; Slava Ovsiienko <viacheslavo at nvidia.com>
> Subject: [PATCH 4/4] net/mlx5: define index register for linear tables
> 
> Set MLX5_LINEAR_HASH_TAG_INDEX as a special id for the TAG item:
> it holds the index in a linear table for a packet to land to.
> This rule index in the table uses upper 16-bits of REG_C_3, handle this TAG item
> in the modify_field API for setting the index.
> 
> Signed-off-by: Alexander Kozyrev <akozyrev at nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>