[PATCH] doc: update mlx5 limitations on ESP header match

[Viacheslav Ovsiienko]

The match on ESP header is supported over PF only.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
---
 doc/guides/nics/mlx5.rst | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 7960a42e9c..1698831c5f 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -289,6 +289,8 @@ Limitations
 - When using DV/Verbs flow engine (``dv_flow_en`` = 1/0 respectively),
   match on SPI field in ESP header for group 0 is supported from ConnectX-7.
 
+- Matching on SPI field in ESP header is supported over the PF only.
+
 - Flex item:
 
   - Hardware support: **NVIDIA BlueField-2** and **NVIDIA BlueField-3**.
-- 
2.18.1