[EXT] Re: [PATCH 1/2] raw/cnxk_gpio: support multi-process mode
Tomasz Duszynski
tduszynski at marvell.com
Wed Oct 4 22:35:39 CEST 2023
>-----Original Message-----
>From: Stephen Hemminger <stephen at networkplumber.org>
>Sent: Wednesday, October 4, 2023 12:29 AM
>To: Tomasz Duszynski <tduszynski at marvell.com>
>Cc: dev at dpdk.org; Jakub Palider <jpalider at marvell.com>; Anatoly Burakov
><anatoly.burakov at intel.com>; Jerin Jacob Kollanukkaran <jerinj at marvell.com>; thomas at monjalon.net
>Subject: [EXT] Re: [PATCH 1/2] raw/cnxk_gpio: support multi-process mode
>
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>On Tue, 3 Oct 2023 22:46:02 +0200
>Tomasz Duszynski <tduszynski at marvell.com> wrote:
>
>> +
>> +struct cnxk_gpio_params {
>> + char allowlist[CNXK_GPIO_BUFSZ];
>> + int num;
>> +};
>
>Should be using unsigned for number of params since can't be negative.
I don't think that it breaks anything currently i.e in worst case scenario
chip won't be found in sysfs but from correctness pov you are right. Will change that in v2.
>You could also use a flex array to avoid any buf size issues.
Okay, will address that in v2.
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