[PATCH v5 15/21] common/idpf: add wmb before tail

[Hore, Soumyadeep]

> Introduced through customer's feedback in their attempt to address 
> some bugs this introduces a memory barrier before posting ctlq tail. 
> This makes sure memory writes have a chance to take place before HW 
> starts messing with the descriptors.
> 
> Signed-off-by: Soumyadeep Hore <soumyadeep.hore at intel.com>
> ---

>From the description, it seems that this may be a bugfix patch. Can you confirm this and whether it should be backported or not. Also, provide a fixes tag for this.

Thanks,
/Bruce

This is a new feature supported in MEV TS 1.4 which is only compatible with dpdk 24.07. 
So previous dpdk versions are not affected, hence backporting is not required.

Regards,
Soumya

>  drivers/common/idpf/base/idpf_controlq.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/common/idpf/base/idpf_controlq.c 
> b/drivers/common/idpf/base/idpf_controlq.c
> index 65e5599614..4f47759a4f 100644
> --- a/drivers/common/idpf/base/idpf_controlq.c
> +++ b/drivers/common/idpf/base/idpf_controlq.c
> @@ -604,6 +604,8 @@ int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq,
>  			/* Wrap to end of end ring since current ntp is 0 */
>  			cq->next_to_post = cq->ring_size - 1;
>  
> +		idpf_wmb();
> +
>  		wr32(hw, cq->reg.tail, cq->next_to_post);
>  	}
>  
> --
> 2.43.0
>