[PATCH v6 1/2] bus/pci: fix secondary process PCI uio resource map problem
Chenbo Xia
chenbox at nvidia.com
Thu Jul 4 11:00:29 CEST 2024
> On Jul 2, 2024, at 15:40, Chaoyong He <chaoyong.he at corigine.com> wrote:
>
> External email: Use caution opening links or attachments
>
>
> From: Zerun Fu <zerun.fu at corigine.com>
>
> For the primary process, the logic loops all BARs and will skip
> the map of BAR with an invalid physical address (0), also will
> assign 'uio_res->nb_maps' with the real mapped BARs number. But
> for the secondary process, instead of loops all BARs, the logic
> using the 'uio_res->nb_map' as index. If the device uses continuous
> BARs there will be no problem, whereas if it uses discrete BARs,
> it will lead to mapping errors.
>
> Fix this problem by also loops all BARs and skip the map of BAR
> with an invalid physical address in secondary process.
>
> Fixes: 9b957f378abf ("pci: merge uio functions for linux and bsd")
> Cc: mukawa at igel.co.jp
> Cc: stable at dpdk.org
>
> Signed-off-by: Zerun Fu <zerun.fu at corigine.com>
> Reviewed-by: Chaoyong He <chaoyong.he at corigine.com>
> Reviewed-by: Long Wu <long.wu at corigine.com>
> Reviewed-by: Peng Zhang <peng.zhang at corigine.com>
> Acked-by: Anatoly Burakov <anatoly.burakov at intel.com>
> ---
> drivers/bus/pci/pci_common_uio.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/bus/pci/pci_common_uio.c b/drivers/bus/pci/pci_common_uio.c
> index 76c661f054..f44ccdf27c 100644
> --- a/drivers/bus/pci/pci_common_uio.c
> +++ b/drivers/bus/pci/pci_common_uio.c
> @@ -26,7 +26,7 @@ EAL_REGISTER_TAILQ(rte_uio_tailq)
> static int
> pci_uio_map_secondary(struct rte_pci_device *dev)
> {
> - int fd, i, j;
> + int fd, i = 0, j, res_idx;
> struct mapped_pci_resource *uio_res;
> struct mapped_pci_res_list *uio_res_list =
> RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
> @@ -37,7 +37,15 @@ pci_uio_map_secondary(struct rte_pci_device *dev)
> if (rte_pci_addr_cmp(&uio_res->pci_addr, &dev->addr))
> continue;
>
> - for (i = 0; i != uio_res->nb_maps; i++) {
> + /* Map all BARs */
> + for (res_idx = 0; res_idx != PCI_MAX_RESOURCE; res_idx++) {
> + /* skip empty BAR */
> + if (dev->mem_resource[res_idx].phys_addr == 0)
> + continue;
> +
> + if (i >= uio_res->nb_maps)
> + return -1;
> +
> /*
> * open devname, to mmap it
> */
> @@ -71,7 +79,9 @@ pci_uio_map_secondary(struct rte_pci_device *dev)
> }
> return -1;
> }
> - dev->mem_resource[i].addr = mapaddr;
> + dev->mem_resource[res_idx].addr = mapaddr;
> +
> + i++;
> }
> return 0;
> }
> —
> 2.39.1
>
Reviewed-by: Chenbo Xia <chenbox at nvidia.com>
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