[PATCH v3 05/15] net/intel: introduce common vector capability function

[Ciara Loftus]

From: Bruce Richardson <bruce.richardson at intel.com>

A common need within the drivers is to select between SSE, AVX2 and
AVX-512 code paths. Provide a common function which helps with this
decision making, that returns the max simd bandwidth based on any
user configured maximums and available CPU flags.

Signed-off-by: Bruce Richardson <bruce.richardson at intel.com>
Signed-off-by: Ciara Loftus <ciara.loftus at intel.com>
---
 drivers/net/intel/common/rx_vec_x86.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/net/intel/common/rx_vec_x86.h b/drivers/net/intel/common/rx_vec_x86.h
index 3d7343b1ff..32dd5ce189 100644
--- a/drivers/net/intel/common/rx_vec_x86.h
+++ b/drivers/net/intel/common/rx_vec_x86.h
@@ -346,4 +346,26 @@ ci_rxq_rearm(struct ci_rx_queue *rxq, const enum ci_rx_vec_level vec_level)
 	rte_write32_wc(rte_cpu_to_le_32(rx_id), rxq->qrx_tail);
 }
 
+#ifdef CC_AVX512_SUPPORT
+#define X86_MAX_SIMD_BITWIDTH (rte_vect_get_max_simd_bitwidth())
+#else
+#define X86_MAX_SIMD_BITWIDTH RTE_MIN(256, rte_vect_get_max_simd_bitwidth())
+#endif /* CC_AVX512_SUPPORT */
+
+static inline enum rte_vect_max_simd
+ci_get_x86_max_simd_bitwidth(void)
+{
+	int ret = RTE_VECT_SIMD_DISABLED;
+	int simd = X86_MAX_SIMD_BITWIDTH;
+
+	if (simd >= 512 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
+			rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
+		ret = RTE_VECT_SIMD_512;
+	else if (simd >= 256 && (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1))
+		ret = RTE_VECT_SIMD_256;
+	else if (simd >= 128)
+		ret = RTE_VECT_SIMD_128;
+	return ret;
+}
+
 #endif /* _COMMON_INTEL_RX_VEC_X86_H_ */
-- 
2.34.1