[PATCH v2 1/7] event/dlb2: addresses deq failure when CQ depth <= 16

[Jerin Jacob]

On Tue, Jun 3, 2025 at 11:47 PM Pravin Pathak <pravin.pathak at intel.com> wrote:
>
> When application configures a DIR port with CQ depth less than 8, DLB PMD
> sets port's cq_depth as 8 and token reservation is used to make the
> effective cq_depth smaller. However, while setting port's cq_depth_mask
> application configured CQ depth was used resulting in reading incorrect
> cachelines while dequeuing. Use PMD calculated CQ depth for cq_depth_mask
> calculation.
>
> Signed-off-by: Pravin Pathak <pravin.pathak at intel.com>
> Signed-off-by: Tirthendu Sarkar <tirthendu.sarkar at intel.com>

it looks like except 4/7 remaining patches are fixes. please change
relevant patches subject to event/dlb2: fix ...
and add Fixes tag,