[PATCH v5 19/34] net/ixgbe: add a desc done function

Bruce Richardson bruce.richardson at intel.com
Mon Jun 9 13:56:36 CEST 2025


On Mon, Jun 09, 2025 at 11:04:39AM +0200, Burakov, Anatoly wrote:
> On 6/6/2025 7:08 PM, Anatoly Burakov wrote:
> > Add a function to check DD bit status, and use it everywhere we do these
> > checks.
> > 
> > Signed-off-by: Anatoly Burakov <anatoly.burakov at intel.com>
> > ---
> > 
> > Notes:
> >      v5:
> >      - Add this commit
> > 
> >   drivers/net/intel/ixgbe/ixgbe_rxtx.c            |  8 ++------
> >   drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.c |  4 +---
> >   drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.h | 12 +++++++++---
> >   3 files changed, 12 insertions(+), 12 deletions(-)
> > 
> > diff --git a/drivers/net/intel/ixgbe/ixgbe_rxtx.c b/drivers/net/intel/ixgbe/ixgbe_rxtx.c
> > index 5f0aedb4cd..50060ce64e 100644
> > --- a/drivers/net/intel/ixgbe/ixgbe_rxtx.c
> > +++ b/drivers/net/intel/ixgbe/ixgbe_rxtx.c
> > @@ -118,13 +118,11 @@ static __rte_always_inline int
> >   ixgbe_tx_free_bufs(struct ci_tx_queue *txq)
> >   {
> >   	struct ci_tx_entry *txep;
> > -	uint32_t status;
> >   	int i, nb_free = 0;
> >   	struct rte_mbuf *m, *free[RTE_IXGBE_TX_MAX_FREE_BUF_SZ];
> >   	/* check DD bit on threshold descriptor */
> > -	status = txq->ixgbe_tx_ring[txq->tx_next_dd].wb.status;
> > -	if (!(status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD)))
> > +	if (!ixgbe_tx_desc_done(txq, txq->tx_next_dd))
> >   		return 0;
> >   	/*
> > @@ -3412,7 +3410,6 @@ int
> >   ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
> >   {
> >   	struct ci_tx_queue *txq = tx_queue;
> > -	volatile uint32_t *status;
> >   	uint32_t desc;
> >   	if (unlikely(offset >= txq->nb_tx_desc))
> > @@ -3428,8 +3425,7 @@ ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
> >   			desc -= txq->nb_tx_desc;
> >   	}
> > -	status = &txq->ixgbe_tx_ring[desc].wb.status;
> > -	if (*status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD))
> > +	if (ixgbe_tx_desc_done(txq, desc))
> >   		return RTE_ETH_TX_DESC_DONE;
> >   	return RTE_ETH_TX_DESC_FULL;
> > diff --git a/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.c b/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.c
> > index cf6d3e4914..707dc7f5f9 100644
> > --- a/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.c
> > +++ b/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.c
> > @@ -215,7 +215,6 @@ ixgbe_recycle_tx_mbufs_reuse_vec(void *tx_queue,
> >   	struct ci_tx_entry *txep;
> >   	struct rte_mbuf **rxep;
> >   	int i, n;
> > -	uint32_t status;
> >   	uint16_t nb_recycle_mbufs;
> >   	uint16_t avail = 0;
> >   	uint16_t mbuf_ring_size = recycle_rxq_info->mbuf_ring_size;
> > @@ -232,8 +231,7 @@ ixgbe_recycle_tx_mbufs_reuse_vec(void *tx_queue,
> >   		return 0;
> >   	/* check DD bits on threshold descriptor */
> > -	status = txq->ixgbe_tx_ring[txq->tx_next_dd].wb.status;
> > -	if (!(status & IXGBE_ADVTXD_STAT_DD))
> > +	if (!ixgbe_tx_desc_done(txq, txq->tx_next_dd))
> >   		return 0;
> >   	n = txq->tx_rs_thresh;
> > diff --git a/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.h b/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.h
> > index 4678a5dfd9..56e13b4125 100644
> > --- a/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.h
> > +++ b/drivers/net/intel/ixgbe/ixgbe_rxtx_vec_common.h
> > @@ -25,19 +25,25 @@ void ixgbe_recycle_rx_descriptors_refill_vec(void *rx_queue, uint16_t nb_mbufs);
> >   uint16_t ixgbe_recycle_tx_mbufs_reuse_vec(void *tx_queue,
> >   		struct rte_eth_recycle_rxq_info *recycle_rxq_info);
> > +static inline int
> > +ixgbe_tx_desc_done(struct ci_tx_queue *txq, uint16_t idx)
> > +{
> > +	const uint32_t status = txq->ixgbe_tx_ring[idx].wb.status;
> > +
> > +	return !!(status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD));
> > +}
> > +
> 
> This causes compilation errors down the line because vec_common isn't
> included by drivers that don't support vector driver, so I'll move this to
> ixgbe_rxtx.h in v6.
> 
> (alternatively, we can keep the stubs and not do conditional inclusion of
> vector code headers)
> 
When fixed, you can include my ack:

Acked-by: Bruce Richardson <bruce.richardson at intel.com>



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