[PATCH v5 3/3] riscv: override machine_args only when default
Stanisław Kardach
stanislaw.kardach at gmail.com
Fri Jun 27 04:31:15 CEST 2025
On Wed, Jun 11, 2025 at 5:23 PM <uk7b at foxmail.com> wrote:
>
> From: Sun Yuechi <sunyuechi at iscas.ac.cn>
>
> Support using -Dcpu_instruction_set=rv64gcv to enable V extension.
>
> Signed-off-by: Sun Yuechi <sunyuechi at iscas.ac.cn>
> ---
> config/riscv/meson.build | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/config/riscv/meson.build b/config/riscv/meson.build
> index e3694cf2e6..1036a86d05 100644
> --- a/config/riscv/meson.build
> +++ b/config/riscv/meson.build
> @@ -111,6 +111,7 @@ arch_config = arch_config[arch_id]
> # Concatenate flags respecting priorities.
> dpdk_flags = flags_common + vendor_config['flags'] + arch_config.get('flags', [])
>
> +if (cpu_instruction_set == 'rv64gc')
Perhaps instead of removing full flag customization, we should skip
the -march flag within foreach if cpu_instruction_set!='rv64gc'.
Reason being that just 'rv64gc' doesn't mean the default. Look at
SiFive configs - they have -march=rv64gc but -mtune specific to those
boards.
> # apply supported machine args
> machine_args = [] # Clear previous machine args
> foreach flag: arch_config['machine_args']
> @@ -118,6 +119,7 @@ foreach flag: arch_config['machine_args']
> machine_args += flag
> endif
> endforeach
> +endif
Small nit - there's an indentation level missing around #if-#endif
>
> # check if we can do buildtime detection of extensions supported by the target
> riscv_extension_macros = false
> --
> 2.49.0
>
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