[PATCH v4 2/2] net/mlx5: support PF representor suppression in multi-port E-Switch

Dariusz Sosnowski dsosnowski at nvidia.com
Wed Nov 12 11:12:55 CET 2025


On Thu, Nov 06, 2025 at 07:52:45AM +0200, Gregory Etelson wrote:
> In multi-port E-Switch setup, the MLX5 PMD always added
> PF representor port.
> For example, `representor=pf1vf[0,1]` implicitly added PF1 representor
> port:
> 
> ```
> Port     Name
> 0        p0
> 1        p1
> 2        representor_c0pf1vf0
> 3        representor_c0pf1vf1
> ```
> 
> The patch adds support for the new representor format that suppresses
> PF representor attachment:
> 
> Example: `representor=(pf1)vf[0,1]`
> 
> ```
> Port     Name
> 0        p0
> 1        representor_c0pf1vf0
> 2        representor_c0pf1vf1
> ```
> 
> Signed-off-by: Gregory Etelson <getelson at nvidia.com>

Ackedy-by: Dariusz Sosnowski <dsosnowski at nvidia.com>


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