[RFC 1/2] config: add optimal burst size configuration

[pbhagavatula at marvell.com]

From: Pavan Nikhilesh <pbhagavatula at marvell.com>

Add RTE_OPTIMAL_BURST_SIZE to allow platforms to configure the
optimal burst size.

Set default value to 64 for soc_cn10k and 32 generally.

Signed-off-by: Pavan Nikhilesh <pbhagavatula at marvell.com>
---
This improves performance by 5% on l2fwd, other examples showed
negligible difference on CN10K.

 config/arm/meson.build | 1 +
 config/meson.build     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 523b0fc0ed50..fa64c07016b1 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -481,6 +481,7 @@ soc_cn10k = {
         ['RTE_MAX_LCORE', 24],
         ['RTE_MAX_NUMA_NODES', 1],
         ['RTE_MEMPOOL_ALIGN', 128],
+        ['RTE_OPTIMAL_BURST_SIZE', 64],
     ],
     'part_number': '0xd49',
     'extra_march_features': ['crypto'],
diff --git a/config/meson.build b/config/meson.build
index 0cb074ab95b7..95367ae88e2d 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -386,6 +386,7 @@ if get_option('mbuf_refcnt_atomic')
     dpdk_conf.set('RTE_MBUF_REFCNT_ATOMIC', true)
 endif
 dpdk_conf.set10('RTE_IOVA_IN_MBUF', get_option('enable_iova_as_pa'))
+dpdk_conf.set('RTE_OPTIMAL_BURST_SIZE', 32)

 compile_time_cpuflags = []
 subdir(arch_subdir)
--
2.50.1 (Apple Git-155)