[PATCH v3 1/4] config/riscv: detect V extension
孙越池
sunyuechi at iscas.ac.cn
Fri Sep 19 20:52:06 CEST 2025
> Please could you add a cross file in config/riscv/ for rv64gcv
> and use it in devtools/test-meson-builds.sh so we can test compiling
> with the vector extension?
Sure, I plan to submit this next week.
> Another question about RISC-V maintenance in general,
> what do you think about other pending patches for RISC-V?
I would like to prioritize merging the hwprobe detection. The related work is already mostly done here:
[PATCH v3 0/9] riscv: implement accelerated crc using zbc
The next step is to contact the author for a rebase and then review it. After that, the following patch will be handled:
[PATCH 0/2] eal/riscv: implement prefetch using zicbop
In addition, our team has several riscv v extension optimization patches that we are refining and will submit soon.
I would prefer to be added as a maintainer, as this might make communication with other authors more efficient.
> -----原始邮件-----
> 发件人: "Thomas Monjalon" <thomas at monjalon.net>
> 发送时间: 2025-09-20 02:16:22 (星期六)
> 收件人: "Sun Yuechi" <sunyuechi at iscas.ac.cn>, uk7b at foxmail.com
> 抄送: dev at dpdk.org, "Stanislaw Kardach" <stanislaw.kardach at gmail.com>, "Bruce Richardson" <bruce.richardson at intel.com>
> 主题: Re: [PATCH v3 1/4] config/riscv: detect V extension
>
> 19/09/2025 18:33, uk7b at foxmail.com:
> > From: Sun Yuechi <sunyuechi at iscas.ac.cn>
> >
> > This patch is derived from "config/riscv: detect presence of Zbc
> > extension with modifications".
> >
> > The RISC-V C api defines architecture extension test macros
> > These let us detect whether the V extension is supported on the
> > compiler and -march we're building with. The C api also defines V
> > intrinsics we can use rather than inline assembly on newer versions of
> > GCC (14.1.0+) and Clang (18.1.0+).
> >
> > If the V extension and intrinsics are both present and we can detect
> > the V extension at runtime, we define a flag, RTE_RISCV_FEATURE_V.
> >
> > Signed-off-by: Sun Yuechi <sunyuechi at iscas.ac.cn>
>
> Series merged with style improvements, thanks.
>
> Please could you add a cross file in config/riscv/ for rv64gcv
> and use it in devtools/test-meson-builds.sh so we can test compiling
> with the vector extension?
>
> Another question about RISC-V maintenance in general,
> what do you think about other pending patches for RISC-V?
>
</sunyuechi at iscas.ac.cn></sunyuechi at iscas.ac.cn></bruce.richardson at intel.com></stanislaw.kardach at gmail.com></sunyuechi at iscas.ac.cn></thomas at monjalon.net>
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