[PATCH] net/mlx5: fix VLAN strip info for CQE compression
Raslan Darawsheh
rasland at nvidia.com
Tue Mar 24 14:03:47 CET 2026
Hi,
On 20/03/2026 6:00 PM, Dariusz Sosnowski wrote:
> When L3/L4 mini CQE format is used with CQE compression
> (rxq_cqe_comp_en set to 4 in lower 3 bits),
> each mini CQE reports packet header info for relevant packet.
> One bit in that header info is dedicated to CVLAN info,
> used to determine whether CVLAN is present in the received packet.
> This info is used to determine VLAN stripping info
> when relevant offload is enabled.
>
> Before this patch, users might have seen incorrectly set/unset
> RTE_MBUF_F_RX_VLAN and RTE_MBUF_F_RX_VLAN_STRIPPED flags because:
>
> - Struct for mlx5 mini CQE incorrectly defined the location
> of packet header info byte - it was swapped with neighboring
> reserved byte.
> - CVLAN bit was checked incorrectly because of cast to uint16_t
> and big endian change. It should be checked as uint8_t.
>
> This patch addresses the above.
>
> Fixes: 54c2d46b160f ("net/mlx5: support flow tag and packet header miniCQEs")
> Cc: akozyrev at nvidia.com
> Cc: stable at dpdk.org
>
> Signed-off-by: Dariusz Sosnowski <dsosnowski at nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
> ---
Patch applied to next-net-mlx,
Kindest regards
Raslan Darawsheh
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