[PATCH v5 0/3] eal/topology: introduce topology-aware lcore grouping

[Varghese, Vipin]

AMD General

Thank you very much! Then I will use tag x86 and RISCV

> -----Original Message-----
> From: Sun Yuechi <sunyuechi at iscas.ac.cn>
> Sent: Tuesday, October 13, 2026 6:40 PM
> To: Varghese, Vipin <Vipin.Varghese at amd.com>
> Cc: dev at dpdk.org; Stephen Hemminger <stephen at networkplumber.org>;
> Wathsala Vithanage <wathsala.vithanage at arm.com>; Ajit Khaparde
> <ajit.khaparde at broadcom.com>; Honnappa Nagarahalli
> <honnappa.nagarahalli at arm.com>; Tummala, Sivaprasad
> <Sivaprasad.Tummala at amd.com>; Konstantin Ananyev
> <konstantin.ananyev at huawei.com>; Bruce Richardson
> <bruce.richardson at intel.com>; Jan Viktorin <viktorin at cesnet.cz>; Morten Brørup
> <mb at smartsharesystems.com>; Thomas Monjalon <thomas at monjalon.net>;
> David Marchand <david.marchand at redhat.com>
> Subject: Re: [PATCH v5 0/3] eal/topology: introduce topology-aware lcore grouping
>
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>
> Hi Vipin,
>
> Tested v5 on two RISC-V machines, no RISC-V specific code needed.
> topology_autotest passes on both. L3 is detected where the firmware describes it
> (SG2044), and empty where it doesn't, same as on ARM.
>
> Tested-by: Sun Yuechi <sunyuechi at iscas.ac.cn>