[PATCH v6 0/5] dma/imx_edma5: introduce NXP i.MX95 eDMA5 driver

[David Marchand]

On Wed, 14 Oct 2026 at 05:58, Gagandeep Singh <g.singh at nxp.com> wrote:
>
> V6-changes:
>   - Rebased the series to the top of main branch.
>
> V5-changes:
>   - Added DP logs.
>   - removed unwanted checks.
>   - fixed comments, coding style.
>
> V4-changes:
>   - Removed the redundant local buffer "want"
>   - Updated the comment for RTE_PMD_REGISTER_ALIAS
>   - Removed stray extra blank line.
>
> V3-changes:
>  - Fixed below AI comments:
>    - Dead quote-stripping removed (`of_device_is_compatible`)
>    - Redundant `goto out` removed
>    - New Features entry added for bus platform changes.
>    - Scatter-gather doc corrected in both sections
>    - Unused CH_MATTR macros removed
>    - Fixed SG sub-transfer length cap (`imx_edma5_copy_sg`)
>    - Updated Per-job timeout logic.
>    - Updated `rte_mem_iova2virt` per-op in IOVA=VA mode logic
>    - Updated comments and documentation as per the AI comments.
>
> V2-changes:
>  - Added dependent patch: bus/platform: match device by devicetree compatible string
>  - Fixed multiple AI reported issues includes:
>    - removed the alias from the driver, no need of it
>    - removed imx_edma5_write32 from data-path, reported as coherency
>      concern.
>    - fix submit for previously enqueued jobs.
>    - Added dsb in data path
>    - Added a commnet for rte_mem_iova2virt() NULL behaviour.
>    - Fixed: TCD NBYTES bits 31:30 are SMLOE/DMLOE — full 32-bit length corrupts them
>    - Data path is fully synchronous: Acknowledged but intentionally deferred —
>      the synchronous design is a deliberate simplification for the initial upstream submission.
>      Noted in docs.
>    - In-memory TCD64 pool is more complex than needed:
>      Noted/deferred — the pool structure was retained for forward compatibility
>      with hardware SG chaining.
>    - Extended `imx_edma5_dump()` to read and print `CH_CSR` and `CH_ES` registers
>      for every configured vchan.
>    - Double and stary lines removed.
>
> V1:
> This patch series adds a new dmadev Poll-Mode Driver (PMD) for the NXP
> i.MX95 eDMA5 (Enhanced DMA Type 5) controller.
>
> Key features supported by this driver:
>   - Memory-to-memory copy (RTE_DMA_OP_TYPE_MEMCPY)
>   - Scatter-gather memory copy (RTE_DMA_OP_TYPE_SG)
>   - 64-bit TCD (Transfer Control Descriptor) format
>   - Non-coherent DMA with explicit cache clean/invalidate
>   - Per-channel statistics and register dump for debug
>
> Gagandeep Singh (5):
>   bus/platform: match device by devicetree compatible string
>   dma/imx_edma5: introduce eDMA5 dmadev skeleton
>   dma/imx_edma5: add device configuration
>   dma/imx_edma5: add data path
>   dma/imx_edma5: add statistics and dump
>
>  MAINTAINERS                              |    5 +
>  doc/guides/dmadevs/imx_edma5.rst         |   69 ++
>  doc/guides/dmadevs/index.rst             |    1 +
>  doc/guides/rel_notes/release_26_11.rst   |   15 +
>  drivers/bus/platform/platform.c          |   49 +-
>  drivers/dma/imx_edma5/imx_edma5_dmadev.c | 1156 ++++++++++++++++++++++
>  drivers/dma/imx_edma5/imx_edma5_dmadev.h |  235 +++++
>  drivers/dma/imx_edma5/imx_edma5_hw.h     |  143 +++
>  drivers/dma/imx_edma5/imx_edma5_logs.h   |   22 +
>  drivers/dma/imx_edma5/meson.build        |   10 +
>  drivers/dma/meson.build                  |    1 +
>  11 files changed, 1705 insertions(+), 1 deletion(-)
>  create mode 100644 doc/guides/dmadevs/imx_edma5.rst
>  create mode 100644 drivers/dma/imx_edma5/imx_edma5_dmadev.c
>  create mode 100644 drivers/dma/imx_edma5/imx_edma5_dmadev.h
>  create mode 100644 drivers/dma/imx_edma5/imx_edma5_hw.h
>  create mode 100644 drivers/dma/imx_edma5/imx_edma5_logs.h
>  create mode 100644 drivers/dma/imx_edma5/meson.build

Reformated the RN update and fixed a few coding style issues.
Applied, thanks.


-- 
David Marchand