[PATCH] net/iavf: set interrupt throttling register

[David Marchand]

On Thu, 15 Oct 2026 at 15:43, Bruce Richardson
<bruce.richardson at intel.com> wrote:
>
> On Mon, Oct 05, 2026 at 12:06:13PM +0100, Bruce Richardson wrote:
> > The interrupt throttling register(ITR) bank 0 value is set to 2, but
> > to ensure best performance across all systems also set the bank 1 value
> > to match.
> >
> > Signed-off-by: Bruce Richardson <bruce.richardson at intel.com>
> > ---
> >  drivers/net/intel/iavf/iavf_ethdev.c | 5 +----
> >  1 file changed, 1 insertion(+), 4 deletions(-)
> >
>
> Further testing has indicated that this patch is simply working around a
> config issue on kernel driver side[1] and should not be necessary in DPDK.
>
> Dropping as rejected in patchwork.
>
> /Bruce
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=fb096882095e5a8d6b5159e43793d4a38a0c5b1f
>
> > diff --git a/drivers/net/intel/iavf/iavf_ethdev.c b/drivers/net/intel/iavf/iavf_ethdev.c
> > index a8abe0154c..dc3cea0b95 100644
> > --- a/drivers/net/intel/iavf/iavf_ethdev.c
> > +++ b/drivers/net/intel/iavf/iavf_ethdev.c
> > @@ -899,10 +899,7 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,
> >                                      (0 << IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
> >                                      IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK |
> >                                      (2UL << IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
> > -                     /* debug - check for success! the return value
> > -                      * should be 2, offset is 0x2800
> > -                      */
> > -                     /* IAVF_READ_REG(hw, IAVF_VFINT_ITRN1(0, 0)); */
> > +                     IAVF_WRITE_REG(hw, IAVF_VFINT_ITRN1(1, vf->msix_base - 1), 2);
> >               } else {
> >                       /* If no WB_ON_ITR offload flags, need to set
> >                        * interrupt for descriptor write back.

Why keep this dead code then?


-- 
David Marchand