<div dir="ltr"><div>tested-by: Rushil Gupta <<a href="mailto:rushilg@google.com" target="_blank">rushilg@google.com</a>><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, May 8, 2023 at 8:07 PM Junfeng Guo <<a href="mailto:junfeng.guo@intel.com" target="_blank">junfeng.guo@intel.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Add support for queue operations for GQI:<br>
 - gve_rx_queue_start<br>
 - gve_tx_queue_start<br>
 - gve_rx_queue_stop<br>
 - gve_tx_queue_stop<br>
<br>
Add support for queue operations for DQO:<br>
 - gve_rx_queue_start_dqo<br>
 - gve_tx_queue_start_dqo<br>
 - gve_rx_queue_stop_dqo<br>
 - gve_tx_queue_stop_dqo<br>
<br>
Also move the funcs of rxq_mbufs_alloc into the corresponding files.<br>
<br>
Signed-off-by: Junfeng Guo <<a href="mailto:junfeng.guo@intel.com" target="_blank">junfeng.guo@intel.com</a>><br>
---<br>
 drivers/net/gve/gve_ethdev.c | 166 +++++++++++------------------------<br>
 drivers/net/gve/gve_ethdev.h |  36 ++++++++<br>
 drivers/net/gve/gve_rx.c     |  96 ++++++++++++++++++--<br>
 drivers/net/gve/gve_rx_dqo.c |  97 ++++++++++++++++++--<br>
 drivers/net/gve/gve_tx.c     |  54 ++++++++++--<br>
 drivers/net/gve/gve_tx_dqo.c |  54 ++++++++++--<br>
 6 files changed, 364 insertions(+), 139 deletions(-)<br>
<br>
diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c<br>
index 8b6861a24f..1dcb3b3a01 100644<br>
--- a/drivers/net/gve/gve_ethdev.c<br>
+++ b/drivers/net/gve/gve_ethdev.c<br>
@@ -104,81 +104,6 @@ gve_dev_configure(struct rte_eth_dev *dev)<br>
        return 0;<br>
 }<br>
<br>
-static int<br>
-gve_refill_pages(struct gve_rx_queue *rxq)<br>
-{<br>
-       struct rte_mbuf *nmb;<br>
-       uint16_t i;<br>
-       int diag;<br>
-<br>
-       diag = rte_pktmbuf_alloc_bulk(rxq->mpool, &rxq->sw_ring[0], rxq->nb_rx_desc);<br>
-       if (diag < 0) {<br>
-               for (i = 0; i < rxq->nb_rx_desc - 1; i++) {<br>
-                       nmb = rte_pktmbuf_alloc(rxq->mpool);<br>
-                       if (!nmb)<br>
-                               break;<br>
-                       rxq->sw_ring[i] = nmb;<br>
-               }<br>
-               if (i < rxq->nb_rx_desc - 1)<br>
-                       return -ENOMEM;<br>
-       }<br>
-       rxq->nb_avail = 0;<br>
-       rxq->next_avail = rxq->nb_rx_desc - 1;<br>
-<br>
-       for (i = 0; i < rxq->nb_rx_desc; i++) {<br>
-               if (rxq->is_gqi_qpl) {<br>
-                       rxq->rx_data_ring[i].addr = rte_cpu_to_be_64(i * PAGE_SIZE);<br>
-               } else {<br>
-                       if (i == rxq->nb_rx_desc - 1)<br>
-                               break;<br>
-                       nmb = rxq->sw_ring[i];<br>
-                       rxq->rx_data_ring[i].addr = rte_cpu_to_be_64(rte_mbuf_data_iova(nmb));<br>
-               }<br>
-       }<br>
-<br>
-       rte_write32(rte_cpu_to_be_32(rxq->next_avail), rxq->qrx_tail);<br>
-<br>
-       return 0;<br>
-}<br>
-<br>
-static int<br>
-gve_refill_dqo(struct gve_rx_queue *rxq)<br>
-{<br>
-       struct rte_mbuf *nmb;<br>
-       uint16_t i;<br>
-       int diag;<br>
-<br>
-       diag = rte_pktmbuf_alloc_bulk(rxq->mpool, &rxq->sw_ring[0], rxq->nb_rx_desc);<br>
-       if (diag < 0) {<br>
-               rxq->stats.no_mbufs_bulk++;<br>
-               for (i = 0; i < rxq->nb_rx_desc - 1; i++) {<br>
-                       nmb = rte_pktmbuf_alloc(rxq->mpool);<br>
-                       if (!nmb)<br>
-                               break;<br>
-                       rxq->sw_ring[i] = nmb;<br>
-               }<br>
-               if (i < rxq->nb_rx_desc - 1) {<br>
-                       rxq->stats.no_mbufs += rxq->nb_rx_desc - 1 - i;<br>
-                       return -ENOMEM;<br>
-               }<br>
-       }<br>
-<br>
-       for (i = 0; i < rxq->nb_rx_desc; i++) {<br>
-               if (i == rxq->nb_rx_desc - 1)<br>
-                       break;<br>
-               nmb = rxq->sw_ring[i];<br>
-               rxq->rx_ring[i].buf_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(nmb));<br>
-               rxq->rx_ring[i].buf_id = rte_cpu_to_le_16(i);<br>
-       }<br>
-<br>
-       rxq->nb_rx_hold = 0;<br>
-       rxq->bufq_tail = rxq->nb_rx_desc - 1;<br>
-<br>
-       rte_write32(rxq->bufq_tail, rxq->qrx_tail);<br>
-<br>
-       return 0;<br>
-}<br>
-<br>
 static int<br>
 gve_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)<br>
 {<br>
@@ -208,65 +133,68 @@ gve_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)<br>
 }<br>
<br>
 static int<br>
-gve_dev_start(struct rte_eth_dev *dev)<br>
+gve_start_queues(struct rte_eth_dev *dev)<br>
 {<br>
-       uint16_t num_queues = dev->data->nb_tx_queues;<br>
        struct gve_priv *priv = dev->data->dev_private;<br>
-       struct gve_tx_queue *txq;<br>
-       struct gve_rx_queue *rxq;<br>
+       uint16_t num_queues;<br>
        uint16_t i;<br>
-       int err;<br>
+       int ret;<br>
<br>
+       num_queues = dev->data->nb_tx_queues;<br>
        priv->txqs = (struct gve_tx_queue **)dev->data->tx_queues;<br>
-       err = gve_adminq_create_tx_queues(priv, num_queues);<br>
-       if (err) {<br>
-               PMD_DRV_LOG(ERR, "failed to create %u tx queues.", num_queues);<br>
-               return err;<br>
-       }<br>
-       for (i = 0; i < num_queues; i++) {<br>
-               txq = priv->txqs[i];<br>
-               txq->qtx_tail =<br>
-               &priv->db_bar2[rte_be_to_cpu_32(txq->qres->db_index)];<br>
-               txq->qtx_head =<br>
-               &priv->cnt_array[rte_be_to_cpu_32(txq->qres->counter_index)];<br>
-<br>
-               rte_write32(rte_cpu_to_be_32(GVE_IRQ_MASK), txq->ntfy_addr);<br>
-       }<br>
+       ret = gve_adminq_create_tx_queues(priv, num_queues);<br>
+       if (ret != 0) {<br>
+               PMD_DRV_LOG(ERR, "Failed to create %u tx queues.", num_queues);<br>
+               return ret;<br>
+       }<br>
+       for (i = 0; i < num_queues; i++)<br>
+               if (gve_tx_queue_start(dev, i) != 0) {<br>
+                       PMD_DRV_LOG(ERR, "Fail to start Tx queue %d", i);<br>
+                       goto err_tx;<br>
+               }<br>
<br>
        num_queues = dev->data->nb_rx_queues;<br>
        priv->rxqs = (struct gve_rx_queue **)dev->data->rx_queues;<br>
-       err = gve_adminq_create_rx_queues(priv, num_queues);<br>
-       if (err) {<br>
-               PMD_DRV_LOG(ERR, "failed to create %u rx queues.", num_queues);<br>
+       ret = gve_adminq_create_rx_queues(priv, num_queues);<br>
+       if (ret != 0) {<br>
+               PMD_DRV_LOG(ERR, "Failed to create %u rx queues.", num_queues);<br>
                goto err_tx;<br>
        }<br>
        for (i = 0; i < num_queues; i++) {<br>
-               rxq = priv->rxqs[i];<br>
-               rxq->qrx_tail =<br>
-               &priv->db_bar2[rte_be_to_cpu_32(rxq->qres->db_index)];<br>
-<br>
-               rte_write32(rte_cpu_to_be_32(GVE_IRQ_MASK), rxq->ntfy_addr);<br>
-<br>
                if (gve_is_gqi(priv))<br>
-                       err = gve_refill_pages(rxq);<br>
+                       ret = gve_rx_queue_start(dev, i);<br>
                else<br>
-                       err = gve_refill_dqo(rxq);<br>
-               if (err) {<br>
-                       PMD_DRV_LOG(ERR, "Failed to refill for RX");<br>
+                       ret = gve_rx_queue_start_dqo(dev, i);<br>
+               if (ret != 0) {<br>
+                       PMD_DRV_LOG(ERR, "Fail to start Rx queue %d", i);<br>
                        goto err_rx;<br>
                }<br>
        }<br>
<br>
-       dev->data->dev_started = 1;<br>
-       gve_link_update(dev, 0);<br>
-<br>
        return 0;<br>
<br>
 err_rx:<br>
        gve_stop_rx_queues(dev);<br>
 err_tx:<br>
        gve_stop_tx_queues(dev);<br>
-       return err;<br>
+       return ret;<br>
+}<br>
+<br>
+static int<br>
+gve_dev_start(struct rte_eth_dev *dev)<br>
+{<br>
+       int ret;<br>
+<br>
+       ret = gve_start_queues(dev);<br>
+       if (ret != 0) {<br>
+               PMD_DRV_LOG(ERR, "Failed to start queues");<br>
+               return ret;<br>
+       }<br>
+<br>
+       dev->data->dev_started = 1;<br>
+       gve_link_update(dev, 0);<br>
+<br>
+       return 0;<br>
 }<br>
<br>
 static int<br>
@@ -573,6 +501,10 @@ static const struct eth_dev_ops gve_eth_dev_ops = {<br>
        .tx_queue_setup       = gve_tx_queue_setup,<br>
        .rx_queue_release     = gve_rx_queue_release,<br>
        .tx_queue_release     = gve_tx_queue_release,<br>
+       .rx_queue_start       = gve_rx_queue_start,<br>
+       .tx_queue_start       = gve_tx_queue_start,<br>
+       .rx_queue_stop        = gve_rx_queue_stop,<br>
+       .tx_queue_stop        = gve_tx_queue_stop,<br>
        .link_update          = gve_link_update,<br>
        .stats_get            = gve_dev_stats_get,<br>
        .stats_reset          = gve_dev_stats_reset,<br>
@@ -591,6 +523,10 @@ static const struct eth_dev_ops gve_eth_dev_ops_dqo = {<br>
        .tx_queue_setup       = gve_tx_queue_setup_dqo,<br>
        .rx_queue_release     = gve_rx_queue_release_dqo,<br>
        .tx_queue_release     = gve_tx_queue_release_dqo,<br>
+       .rx_queue_start       = gve_rx_queue_start_dqo,<br>
+       .tx_queue_start       = gve_tx_queue_start_dqo,<br>
+       .rx_queue_stop        = gve_rx_queue_stop_dqo,<br>
+       .tx_queue_stop        = gve_tx_queue_stop_dqo,<br>
        .link_update          = gve_link_update,<br>
        .stats_get            = gve_dev_stats_get,<br>
        .stats_reset          = gve_dev_stats_reset,<br>
@@ -877,12 +813,12 @@ gve_dev_init(struct rte_eth_dev *eth_dev)<br>
<br>
        if (gve_is_gqi(priv)) {<br>
                eth_dev->dev_ops = &gve_eth_dev_ops;<br>
-               eth_dev->rx_pkt_burst = gve_rx_burst;<br>
-               eth_dev->tx_pkt_burst = gve_tx_burst;<br>
+               gve_set_rx_function(eth_dev);<br>
+               gve_set_tx_function(eth_dev);<br>
        } else {<br>
                eth_dev->dev_ops = &gve_eth_dev_ops_dqo;<br>
-               eth_dev->rx_pkt_burst = gve_rx_burst_dqo;<br>
-               eth_dev->tx_pkt_burst = gve_tx_burst_dqo;<br>
+               gve_set_rx_function_dqo(eth_dev);<br>
+               gve_set_tx_function_dqo(eth_dev);<br>
        }<br>
<br>
        eth_dev->data->mac_addrs = &priv->dev_addr;<br>
diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h<br>
index 53a75044c5..cd62debd22 100644<br>
--- a/drivers/net/gve/gve_ethdev.h<br>
+++ b/drivers/net/gve/gve_ethdev.h<br>
@@ -367,6 +367,18 @@ gve_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);<br>
 void<br>
 gve_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);<br>
<br>
+int<br>
+gve_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);<br>
+<br>
+int<br>
+gve_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);<br>
+<br>
+int<br>
+gve_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);<br>
+<br>
+int<br>
+gve_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);<br>
+<br>
 void<br>
 gve_stop_tx_queues(struct rte_eth_dev *dev);<br>
<br>
@@ -379,6 +391,12 @@ gve_rx_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);<br>
 uint16_t<br>
 gve_tx_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts);<br>
<br>
+void<br>
+gve_set_rx_function(struct rte_eth_dev *dev);<br>
+<br>
+void<br>
+gve_set_tx_function(struct rte_eth_dev *dev);<br>
+<br>
 /* Below functions are used for DQO */<br>
<br>
 int<br>
@@ -397,6 +415,18 @@ gve_tx_queue_release_dqo(struct rte_eth_dev *dev, uint16_t qid);<br>
 void<br>
 gve_rx_queue_release_dqo(struct rte_eth_dev *dev, uint16_t qid);<br>
<br>
+int<br>
+gve_rx_queue_start_dqo(struct rte_eth_dev *dev, uint16_t rx_queue_id);<br>
+<br>
+int<br>
+gve_tx_queue_start_dqo(struct rte_eth_dev *dev, uint16_t tx_queue_id);<br>
+<br>
+int<br>
+gve_rx_queue_stop_dqo(struct rte_eth_dev *dev, uint16_t rx_queue_id);<br>
+<br>
+int<br>
+gve_tx_queue_stop_dqo(struct rte_eth_dev *dev, uint16_t tx_queue_id);<br>
+<br>
 void<br>
 gve_stop_tx_queues_dqo(struct rte_eth_dev *dev);<br>
<br>
@@ -409,4 +439,10 @@ gve_rx_burst_dqo(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);<br>
 uint16_t<br>
 gve_tx_burst_dqo(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts);<br>
<br>
+void<br>
+gve_set_rx_function_dqo(struct rte_eth_dev *dev);<br>
+<br>
+void<br>
+gve_set_tx_function_dqo(struct rte_eth_dev *dev);<br>
+<br>
 #endif /* _GVE_ETHDEV_H_ */<br>
diff --git a/drivers/net/gve/gve_rx.c b/drivers/net/gve/gve_rx.c<br>
index f2f6202404..b8c92ccda0 100644<br>
--- a/drivers/net/gve/gve_rx.c<br>
+++ b/drivers/net/gve/gve_rx.c<br>
@@ -414,11 +414,91 @@ gve_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id,<br>
        return err;<br>
 }<br>
<br>
+static int<br>
+gve_rxq_mbufs_alloc(struct gve_rx_queue *rxq)<br>
+{<br>
+       struct rte_mbuf *nmb;<br>
+       uint16_t i;<br>
+       int diag;<br>
+<br>
+       diag = rte_pktmbuf_alloc_bulk(rxq->mpool, &rxq->sw_ring[0], rxq->nb_rx_desc);<br>
+       if (diag < 0) {<br>
+               for (i = 0; i < rxq->nb_rx_desc - 1; i++) {<br>
+                       nmb = rte_pktmbuf_alloc(rxq->mpool);<br>
+                       if (!nmb)<br>
+                               break;<br>
+                       rxq->sw_ring[i] = nmb;<br>
+               }<br>
+               if (i < rxq->nb_rx_desc - 1)<br>
+                       return -ENOMEM;<br>
+       }<br>
+       rxq->nb_avail = 0;<br>
+       rxq->next_avail = rxq->nb_rx_desc - 1;<br>
+<br>
+       for (i = 0; i < rxq->nb_rx_desc; i++) {<br>
+               if (rxq->is_gqi_qpl) {<br>
+                       rxq->rx_data_ring[i].addr = rte_cpu_to_be_64(i * PAGE_SIZE);<br>
+               } else {<br>
+                       if (i == rxq->nb_rx_desc - 1)<br>
+                               break;<br>
+                       nmb = rxq->sw_ring[i];<br>
+                       rxq->rx_data_ring[i].addr = rte_cpu_to_be_64(rte_mbuf_data_iova(nmb));<br>
+               }<br>
+       }<br>
+<br>
+       rte_write32(rte_cpu_to_be_32(rxq->next_avail), rxq->qrx_tail);<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
+int<br>
+gve_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)<br>
+{<br>
+       struct gve_priv *hw = dev->data->dev_private;<br>
+       struct gve_rx_queue *rxq;<br>
+       int ret;<br>
+<br>
+       if (rx_queue_id >= dev->data->nb_rx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       rxq = dev->data->rx_queues[rx_queue_id];<br>
+<br>
+       rxq->qrx_tail = &hw->db_bar2[rte_be_to_cpu_32(rxq->qres->db_index)];<br>
+<br>
+       rte_write32(rte_cpu_to_be_32(GVE_IRQ_MASK), rxq->ntfy_addr);<br>
+<br>
+       ret = gve_rxq_mbufs_alloc(rxq);<br>
+       if (ret != 0) {<br>
+               PMD_DRV_LOG(ERR, "Failed to alloc Rx queue mbuf");<br>
+               return ret;<br>
+       }<br>
+<br>
+       dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
+int<br>
+gve_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)<br>
+{<br>
+       struct gve_rx_queue *rxq;<br>
+<br>
+       if (rx_queue_id >= dev->data->nb_rx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       rxq = dev->data->rx_queues[rx_queue_id];<br>
+       gve_release_rxq_mbufs(rxq);<br>
+       gve_reset_rxq(rxq);<br>
+<br>
+       dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
 void<br>
 gve_stop_rx_queues(struct rte_eth_dev *dev)<br>
 {<br>
        struct gve_priv *hw = dev->data->dev_private;<br>
-       struct gve_rx_queue *rxq;<br>
        uint16_t i;<br>
        int err;<br>
<br>
@@ -429,9 +509,13 @@ gve_stop_rx_queues(struct rte_eth_dev *dev)<br>
        if (err != 0)<br>
                PMD_DRV_LOG(WARNING, "failed to destroy rxqs");<br>
<br>
-       for (i = 0; i < dev->data->nb_rx_queues; i++) {<br>
-               rxq = dev->data->rx_queues[i];<br>
-               gve_release_rxq_mbufs(rxq);<br>
-               gve_reset_rxq(rxq);<br>
-       }<br>
+       for (i = 0; i < dev->data->nb_rx_queues; i++)<br>
+               if (gve_rx_queue_stop(dev, i) != 0)<br>
+                       PMD_DRV_LOG(WARNING, "Fail to stop Rx queue %d", i);<br>
+}<br>
+<br>
+void<br>
+gve_set_rx_function(struct rte_eth_dev *dev)<br>
+{<br>
+       dev->rx_pkt_burst = gve_rx_burst;<br>
 }<br>
diff --git a/drivers/net/gve/gve_rx_dqo.c b/drivers/net/gve/gve_rx_dqo.c<br>
index 1d6b21359c..236aefd2a8 100644<br>
--- a/drivers/net/gve/gve_rx_dqo.c<br>
+++ b/drivers/net/gve/gve_rx_dqo.c<br>
@@ -333,11 +333,92 @@ gve_rx_queue_setup_dqo(struct rte_eth_dev *dev, uint16_t queue_id,<br>
        return err;<br>
 }<br>
<br>
+static int<br>
+gve_rxq_mbufs_alloc_dqo(struct gve_rx_queue *rxq)<br>
+{<br>
+       struct rte_mbuf *nmb;<br>
+       uint16_t i;<br>
+       int diag;<br>
+<br>
+       diag = rte_pktmbuf_alloc_bulk(rxq->mpool, &rxq->sw_ring[0], rxq->nb_rx_desc);<br>
+       if (diag < 0) {<br>
+               rxq->stats.no_mbufs_bulk++;<br>
+               for (i = 0; i < rxq->nb_rx_desc - 1; i++) {<br>
+                       nmb = rte_pktmbuf_alloc(rxq->mpool);<br>
+                       if (!nmb)<br>
+                               break;<br>
+                       rxq->sw_ring[i] = nmb;<br>
+               }<br>
+               if (i < rxq->nb_rx_desc - 1) {<br>
+                       rxq->stats.no_mbufs += rxq->nb_rx_desc - 1 - i;<br>
+                       return -ENOMEM;<br>
+               }<br>
+       }<br>
+<br>
+       for (i = 0; i < rxq->nb_rx_desc; i++) {<br>
+               if (i == rxq->nb_rx_desc - 1)<br>
+                       break;<br>
+               nmb = rxq->sw_ring[i];<br>
+               rxq->rx_ring[i].buf_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(nmb));<br>
+               rxq->rx_ring[i].buf_id = rte_cpu_to_le_16(i);<br>
+       }<br>
+<br>
+       rxq->nb_rx_hold = 0;<br>
+       rxq->bufq_tail = rxq->nb_rx_desc - 1;<br>
+<br>
+       rte_write32(rxq->bufq_tail, rxq->qrx_tail);<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
+int<br>
+gve_rx_queue_start_dqo(struct rte_eth_dev *dev, uint16_t rx_queue_id)<br>
+{<br>
+       struct gve_priv *hw = dev->data->dev_private;<br>
+       struct gve_rx_queue *rxq;<br>
+       int ret;<br>
+<br>
+       if (rx_queue_id >= dev->data->nb_rx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       rxq = dev->data->rx_queues[rx_queue_id];<br>
+<br>
+       rxq->qrx_tail = &hw->db_bar2[rte_be_to_cpu_32(rxq->qres->db_index)];<br>
+<br>
+       rte_write32(rte_cpu_to_be_32(GVE_IRQ_MASK), rxq->ntfy_addr);<br>
+<br>
+       ret = gve_rxq_mbufs_alloc_dqo(rxq);<br>
+       if (ret != 0) {<br>
+               PMD_DRV_LOG(ERR, "Failed to alloc Rx queue mbuf");<br>
+               return ret;<br>
+       }<br>
+<br>
+       dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
+int<br>
+gve_rx_queue_stop_dqo(struct rte_eth_dev *dev, uint16_t rx_queue_id)<br>
+{<br>
+       struct gve_rx_queue *rxq;<br>
+<br>
+       if (rx_queue_id >= dev->data->nb_rx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       rxq = dev->data->rx_queues[rx_queue_id];<br>
+       gve_release_rxq_mbufs_dqo(rxq);<br>
+       gve_reset_rxq_dqo(rxq);<br>
+<br>
+       dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
 void<br>
 gve_stop_rx_queues_dqo(struct rte_eth_dev *dev)<br>
 {<br>
        struct gve_priv *hw = dev->data->dev_private;<br>
-       struct gve_rx_queue *rxq;<br>
        uint16_t i;<br>
        int err;<br>
<br>
@@ -345,9 +426,13 @@ gve_stop_rx_queues_dqo(struct rte_eth_dev *dev)<br>
        if (err != 0)<br>
                PMD_DRV_LOG(WARNING, "failed to destroy rxqs");<br>
<br>
-       for (i = 0; i < dev->data->nb_rx_queues; i++) {<br>
-               rxq = dev->data->rx_queues[i];<br>
-               gve_release_rxq_mbufs_dqo(rxq);<br>
-               gve_reset_rxq_dqo(rxq);<br>
-       }<br>
+       for (i = 0; i < dev->data->nb_rx_queues; i++)<br>
+               if (gve_rx_queue_stop_dqo(dev, i) != 0)<br>
+                       PMD_DRV_LOG(WARNING, "Fail to stop Rx queue %d", i);<br>
+}<br>
+<br>
+void<br>
+gve_set_rx_function_dqo(struct rte_eth_dev *dev)<br>
+{<br>
+       dev->rx_pkt_burst = gve_rx_burst_dqo;<br>
 }<br>
diff --git a/drivers/net/gve/gve_tx.c b/drivers/net/gve/gve_tx.c<br>
index 13dc807623..2e0d001109 100644<br>
--- a/drivers/net/gve/gve_tx.c<br>
+++ b/drivers/net/gve/gve_tx.c<br>
@@ -664,11 +664,49 @@ gve_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, uint16_t nb_desc,<br>
        return err;<br>
 }<br>
<br>
+int<br>
+gve_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)<br>
+{<br>
+       struct gve_priv *hw = dev->data->dev_private;<br>
+       struct gve_tx_queue *txq;<br>
+<br>
+       if (tx_queue_id >= dev->data->nb_tx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       txq = dev->data->tx_queues[tx_queue_id];<br>
+<br>
+       txq->qtx_tail = &hw->db_bar2[rte_be_to_cpu_32(txq->qres->db_index)];<br>
+       txq->qtx_head =<br>
+               &hw->cnt_array[rte_be_to_cpu_32(txq->qres->counter_index)];<br>
+<br>
+       rte_write32(rte_cpu_to_be_32(GVE_IRQ_MASK), txq->ntfy_addr);<br>
+<br>
+       dev->data->rx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
+int<br>
+gve_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)<br>
+{<br>
+       struct gve_tx_queue *txq;<br>
+<br>
+       if (tx_queue_id >= dev->data->nb_tx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       txq = dev->data->tx_queues[tx_queue_id];<br>
+       gve_release_txq_mbufs(txq);<br>
+       gve_reset_txq(txq);<br>
+<br>
+       dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
 void<br>
 gve_stop_tx_queues(struct rte_eth_dev *dev)<br>
 {<br>
        struct gve_priv *hw = dev->data->dev_private;<br>
-       struct gve_tx_queue *txq;<br>
        uint16_t i;<br>
        int err;<br>
<br>
@@ -679,9 +717,13 @@ gve_stop_tx_queues(struct rte_eth_dev *dev)<br>
        if (err != 0)<br>
                PMD_DRV_LOG(WARNING, "failed to destroy txqs");<br>
<br>
-       for (i = 0; i < dev->data->nb_tx_queues; i++) {<br>
-               txq = dev->data->tx_queues[i];<br>
-               gve_release_txq_mbufs(txq);<br>
-               gve_reset_txq(txq);<br>
-       }<br>
+       for (i = 0; i < dev->data->nb_tx_queues; i++)<br>
+               if (gve_tx_queue_stop(dev, i) != 0)<br>
+                       PMD_DRV_LOG(WARNING, "Fail to stop Tx queue %d", i);<br>
+}<br>
+<br>
+void<br>
+gve_set_tx_function(struct rte_eth_dev *dev)<br>
+{<br>
+       dev->tx_pkt_burst = gve_tx_burst;<br>
 }<br>
diff --git a/drivers/net/gve/gve_tx_dqo.c b/drivers/net/gve/gve_tx_dqo.c<br>
index b38eeaea4b..e0d144835b 100644<br>
--- a/drivers/net/gve/gve_tx_dqo.c<br>
+++ b/drivers/net/gve/gve_tx_dqo.c<br>
@@ -373,11 +373,49 @@ gve_tx_queue_setup_dqo(struct rte_eth_dev *dev, uint16_t queue_id,<br>
        return err;<br>
 }<br>
<br>
+int<br>
+gve_tx_queue_start_dqo(struct rte_eth_dev *dev, uint16_t tx_queue_id)<br>
+{<br>
+       struct gve_priv *hw = dev->data->dev_private;<br>
+       struct gve_tx_queue *txq;<br>
+<br>
+       if (tx_queue_id >= dev->data->nb_tx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       txq = dev->data->tx_queues[tx_queue_id];<br>
+<br>
+       txq->qtx_tail = &hw->db_bar2[rte_be_to_cpu_32(txq->qres->db_index)];<br>
+       txq->qtx_head =<br>
+               &hw->cnt_array[rte_be_to_cpu_32(txq->qres->counter_index)];<br>
+<br>
+       rte_write32(rte_cpu_to_be_32(GVE_IRQ_MASK), txq->ntfy_addr);<br>
+<br>
+       dev->data->rx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
+int<br>
+gve_tx_queue_stop_dqo(struct rte_eth_dev *dev, uint16_t tx_queue_id)<br>
+{<br>
+       struct gve_tx_queue *txq;<br>
+<br>
+       if (tx_queue_id >= dev->data->nb_tx_queues)<br>
+               return -EINVAL;<br>
+<br>
+       txq = dev->data->tx_queues[tx_queue_id];<br>
+       gve_release_txq_mbufs_dqo(txq);<br>
+       gve_reset_txq_dqo(txq);<br>
+<br>
+       dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
 void<br>
 gve_stop_tx_queues_dqo(struct rte_eth_dev *dev)<br>
 {<br>
        struct gve_priv *hw = dev->data->dev_private;<br>
-       struct gve_tx_queue *txq;<br>
        uint16_t i;<br>
        int err;<br>
<br>
@@ -385,9 +423,13 @@ gve_stop_tx_queues_dqo(struct rte_eth_dev *dev)<br>
        if (err != 0)<br>
                PMD_DRV_LOG(WARNING, "failed to destroy txqs");<br>
<br>
-       for (i = 0; i < dev->data->nb_tx_queues; i++) {<br>
-               txq = dev->data->tx_queues[i];<br>
-               gve_release_txq_mbufs_dqo(txq);<br>
-               gve_reset_txq_dqo(txq);<br>
-       }<br>
+       for (i = 0; i < dev->data->nb_tx_queues; i++)<br>
+               if (gve_tx_queue_stop_dqo(dev, i) != 0)<br>
+                       PMD_DRV_LOG(WARNING, "Fail to stop Tx queue %d", i);<br>
+}<br>
+<br>
+void<br>
+gve_set_tx_function_dqo(struct rte_eth_dev *dev)<br>
+{<br>
+       dev->tx_pkt_burst = gve_tx_burst_dqo;<br>
 }<br>
-- <br>
2.34.1<br>
<br>
</blockquote></div></div>