configure pci_driver, logging macros and declaration of common function for zsda. Signed-off-by: Hanxiao Li <li.hanxiao@zte.com.cn> --- MAINTAINERS | 9 + doc/guides/compressdevs/features/zsda.ini | 7 + doc/guides/compressdevs/index.rst | 1 + doc/guides/compressdevs/zsda.rst | 28 ++ doc/guides/cryptodevs/features/zsda.ini | 7 + doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/zsda.rst | 221 +++++++++++++++ drivers/common/zsda/meson.build | 15 + drivers/common/zsda/zsda_common.c | 240 ++++++++++++++++ drivers/common/zsda/zsda_common.h | 331 ++++++++++++++++++++++ drivers/common/zsda/zsda_device.c | 263 +++++++++++++++++ drivers/common/zsda/zsda_device.h | 123 ++++++++ drivers/common/zsda/zsda_logs.c | 19 ++ drivers/common/zsda/zsda_logs.h | 27 ++ 14 files changed, 1292 insertions(+) create mode 100644 doc/guides/compressdevs/features/zsda.ini create mode 100644 doc/guides/compressdevs/zsda.rst create mode 100644 doc/guides/cryptodevs/features/zsda.ini create mode 100644 doc/guides/cryptodevs/zsda.rst create mode 100644 drivers/common/zsda/meson.build create mode 100644 drivers/common/zsda/zsda_common.c create mode 100644 drivers/common/zsda/zsda_common.h create mode 100644 drivers/common/zsda/zsda_device.c create mode 100644 drivers/common/zsda/zsda_device.h create mode 100644 drivers/common/zsda/zsda_logs.c create mode 100644 drivers/common/zsda/zsda_logs.h diff --git a/MAINTAINERS b/MAINTAINERS index c5a703b5c0..fcea66f9ca 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1221,6 +1221,11 @@ F: drivers/crypto/virtio/ F: doc/guides/cryptodevs/virtio.rst F: doc/guides/cryptodevs/features/virtio.ini +ZTE Storage Data Accelerator(ZSDA) +M: Hanxiao Li <li.hanxiao@zte.com.cn> +F: drivers/common/zsda/ +F: doc/guides/cryptodevs/zsda.rst +F: doc/guides/cryptodevs/features/zsda.ini Compression Drivers ------------------- @@ -1268,6 +1273,10 @@ F: drivers/compress/zlib/ F: doc/guides/compressdevs/zlib.rst F: doc/guides/compressdevs/features/zlib.ini +ZTE Storage Data Accelerator(ZSDA) +M: Hanxiao Li <li.hanxiao@zte.com.cn> +F: doc/guides/compressdevs/zsda.rst +F: doc/guides/compressdevs/features/zsda.ini DMAdev Drivers -------------- diff --git a/doc/guides/compressdevs/features/zsda.ini b/doc/guides/compressdevs/features/zsda.ini new file mode 100644 index 0000000000..9a2edd6aae --- /dev/null +++ b/doc/guides/compressdevs/features/zsda.ini @@ -0,0 +1,7 @@ +; +; Refer to default.ini for the full list of available PMD features. +; +; Supported features of 'ZSDA' compression driver. +; +[Features] +HW Accelerated = Y diff --git a/doc/guides/compressdevs/index.rst b/doc/guides/compressdevs/index.rst index 87ed4f72a4..bab226ffbc 100644 --- a/doc/guides/compressdevs/index.rst +++ b/doc/guides/compressdevs/index.rst @@ -17,3 +17,4 @@ Compression Device Drivers qat_comp uadk zlib + zsda diff --git a/doc/guides/compressdevs/zsda.rst b/doc/guides/compressdevs/zsda.rst new file mode 100644 index 0000000000..a0bb5764d9 --- /dev/null +++ b/doc/guides/compressdevs/zsda.rst @@ -0,0 +1,28 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2024 ZTE Corporation. + +ZTE Storage Data Accelerator (ZSDA) Poll Mode Driver +======================================================= + +The ZSDA compression PMD provides poll mode compression & decompression driver +support for the following hardware accelerator devices: + +* ``ZTE Processing accelerators 1cf2`` + + +Features +-------- + + + +Limitations +----------- + + + +Installation +------------ + +The ZSDA compression PMD is built by default with a standard DPDK build. + +It depends on a ZSDA kernel driver, see :ref:`building_zsda`. diff --git a/doc/guides/cryptodevs/features/zsda.ini b/doc/guides/cryptodevs/features/zsda.ini new file mode 100644 index 0000000000..87c125b8b6 --- /dev/null +++ b/doc/guides/cryptodevs/features/zsda.ini @@ -0,0 +1,7 @@ +; +; Supported features of the 'zsda' crypto driver. +; +; Refer to default.ini for the full list of available PMD features. +; +[Features] +HW Accelerated = Y diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst index 1e57a9fe86..be2620f185 100644 --- a/doc/guides/cryptodevs/index.rst +++ b/doc/guides/cryptodevs/index.rst @@ -34,3 +34,4 @@ Crypto Device Drivers uadk virtio zuc + zsda diff --git a/doc/guides/cryptodevs/zsda.rst b/doc/guides/cryptodevs/zsda.rst new file mode 100644 index 0000000000..4a1a6f6e97 --- /dev/null +++ b/doc/guides/cryptodevs/zsda.rst @@ -0,0 +1,221 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2024 ZTE Corporation. + +ZSDA documentation consists of two parts: + +* Details of the symmetric crypto services below. +* Details of building the common ZSDA infrastructure and the PMDs to support the + above services. See :ref:`building_zsda` below. + + +Symmetric Crypto Service on ZSDA +-------------------------------- + +The ZSDA symmetric crypto PMD provides poll mode crypto driver +support for the following hardware accelerator devices: + +* ``ZTE Processing accelerators 1cf2`` + +Features +~~~~~~~~ + + + +Limitations +~~~~~~~~~~~ + + + +.. _building_zsda: + +Building PMDs on ZSDA +--------------------- + +A ZSDA device can host multiple acceleration services: + +* symmetric cryptography +* data compression + +These services are provided to DPDK applications via PMDs which register to +implement the corresponding cryptodev and compressdev APIs. The PMDs use +common ZSDA driver code which manages the ZSDA PCI device. + + +Configuring and Building the DPDK ZSDA PMDs +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Further information on configuring, building and installing DPDK is described +:doc:`here <../linux_gsg/build_dpdk>`. + +.. _building_zsda_config: + +Build Configuration +~~~~~~~~~~~~~~~~~~~ +These is the build configuration options affecting ZSDA, and its default values: + +.. code-block:: console + + RTE_PMD_ZSDA_MAX_PCI_DEVICES=256 + +ZSDA SYM PMD has an external dependency on libcrypto, so is not built by default. + +Ubuntu + +.. code-block:: console + + apt install libssl-dev + +RHEL + +.. code-block:: console + + dnf install openssl-devel + +The ZSDA compressdev PMD has no external dependencies, so is built by default. + + +Device and driver naming +~~~~~~~~~~~~~~~~~~~~~~~~ + +* The zsda cryptodev symmetric crypto driver name is "crypto_zsda". +* The zsda compressdev compress driver name is "compress_zsda". + +The "rte_cryptodev_devices_get()" returns the devices exposed by either of these drivers. + +* Each zsda sym crypto device has a unique name, in format + "<pci bdf>", e.g. "0000:cc:00.3_zsda". + This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id. + +.. Note:: + + The cryptodev driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter. + + The zsda crypto device name is in the format of the worker parameter passed to the crypto scheduler. + +* The zsda compressdev driver name is "compress_zsda". + The rte_compressdev_devices_get() returns the devices exposed by this driver. + +* Each zsda compression device has a unique name, in format + <pci bdf>, e.g. "0000:cc:00.3_zsda". + This name can be passed to rte_compressdev_get_dev_id() to get the device_id. + + +Enable VFs +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Instructions for installation are below, but first an explanation of the +relationships between the PF/VF devices and the PMDs visible to +DPDK applications. + +Each ZSDA PF device exposes a number of VF devices. Each VF device can +enable one symmetric cryptodev PMD and/or one compressdev PMD. + +These ZSDA PMDs share the same underlying device and pci-mgmt code, but are +enumerated independently on their respective APIs and appear as independent +devices to applications. +.. Note:: + + Each VF can only be used by one DPDK process. It is not possible to share + the same VF across multiple processes, even if these processes are using + different acceleration services. + Conversely one DPDK process can use one or more ZSDA VFs and can expose both + cryptodev and compressdev instances on each of those VFs. + + +The examples below are based on the 1cf2 device, if you have a different device +use the corresponding values in the above table. + +In BIOS ensure that SRIOV is enabled and either: + +* Disable VT-d or +* Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file. + +you need to expose the Virtual Functions (VFs) using the sysfs file system. + +First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of +your device, e.g.:: + + lspci -d:8050 + +You should see output similar to:: + + + cc:00.4 Processing accelerators: Device 1cf2:8050 (rev 01) + ce:00.3 Processing accelerators: Device 1cf2:8050 (rev 01) + d0:00.3 Processing accelerators: Device 1cf2:8050 (rev 01) + d2:00.3 Processing accelerators: Device 1cf2:8050 (rev 01) + +Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver:: + + echo 31 > /sys/bus/pci/device/0000:cc:00.4/sriov_numvfs + echo 31 > /sys/bus/pci/device/0000:ce:00.3/sriov_numvfs + echo 31 > /sys/bus/pci/device/0000:d0:00.3/sriov_numvfs + echo 31 > /sys/bus/pci/device/0000:d2:00.3/sriov_numvfs + +Check that the VFs are available for use. For example ``lspci -d:8051`` should +list 124 VF devices available. + +To complete the installation follow the instructions in +`Binding the available VFs to the vfio-pci driver`_. + +.. Note:: + + If you see the following warning in ``/var/log/messages`` it can be ignored: + ``IOMMU should be enabled for SR-IOV to work correctly``. + +Binding the available VFs to the vfio-pci driver +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Note: + +* Please note that due to security issues, the usage of older DPDK igb_uio + driver is not recommended. This document shows how to use the more secure + vfio-pci driver. + +Unbind the VFs from the stock driver so they can be bound to the vfio-pci driver. + +Bind to the vfio-pci driver +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Load the vfio-pci driver, bind the VF PCI Device id to it using the +``dpdk-devbind.py`` script then use the ``--status`` option +to confirm the VF devices are now in use by vfio-pci kernel driver, +e.g. for the 1cf2 device:: + + cd to the top-level DPDK directory + modprobe vfio-pci + usertools/dpdk-devbind.py -b vfio-pci 0000:cc:01.4 + usertools/dpdk-devbind.py --status + +Use ``modprobe vfio-pci disable_denylist=1`` from kernel 5.9 onwards. +See note in the section `Binding the available VFs to the vfio-pci driver`_ +above. + +Testing +~~~~~~~ + + +Debugging +~~~~~~~~~ + +There are 2 sets of trace available via the dynamic logging feature: + +* pmd.zsda.dp exposes trace on the data-path. +* pmd.zsda.general exposes all other trace. + +pmd.zsda exposes both sets of traces. +They can be enabled using the log-level option (where 8=maximum log level) on +the process cmdline, e.g. using any of the following:: + + --log-level="pmd.zsda.general,8" + --log-level="pmd.zsda.dp,8" + +.. Note:: + + The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to + RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h + for meson build. + Also the dynamic global log level overrides both sets of trace, so e.g. no + ZSDA trace would display in this case:: + + --log-level="pmd.zsda.general,8" --log-level="pmd.zsda,8" diff --git a/drivers/common/zsda/meson.build b/drivers/common/zsda/meson.build new file mode 100644 index 0000000000..376876f4ed --- /dev/null +++ b/drivers/common/zsda/meson.build @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2024 ZTE Corporation + +if is_windows + build = false + reason = 'not supported on Windows' + subdir_done() +endif + +deps += ['bus_pci', 'mbuf'] +sources += files( + 'zsda_logs.c', + 'zsda_common.c', + 'zsda_device.c', + ) diff --git a/drivers/common/zsda/zsda_common.c b/drivers/common/zsda/zsda_common.c new file mode 100644 index 0000000000..8ad5972697 --- /dev/null +++ b/drivers/common/zsda/zsda_common.c @@ -0,0 +1,240 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 ZTE Corporation + */ + +#include "zsda_common.h" + +#include "bus_pci_driver.h" + +#define MAGIC_SEND 0xab +#define MAGIC_RECV 0xcd +#define ADMIN_VER 1 + +static const uint8_t crc8_table[256] = { + 0x00, 0x41, 0x13, 0x52, 0x26, 0x67, 0x35, 0x74, 0x4c, 0x0d, 0x5f, 0x1e, + 0x6a, 0x2b, 0x79, 0x38, 0x09, 0x48, 0x1a, 0x5b, 0x2f, 0x6e, 0x3c, 0x7d, + 0x45, 0x04, 0x56, 0x17, 0x63, 0x22, 0x70, 0x31, 0x12, 0x53, 0x01, 0x40, + 0x34, 0x75, 0x27, 0x66, 0x5e, 0x1f, 0x4d, 0x0c, 0x78, 0x39, 0x6b, 0x2a, + 0x1b, 0x5a, 0x08, 0x49, 0x3d, 0x7c, 0x2e, 0x6f, 0x57, 0x16, 0x44, 0x05, + 0x71, 0x30, 0x62, 0x23, 0x24, 0x65, 0x37, 0x76, 0x02, 0x43, 0x11, 0x50, + 0x68, 0x29, 0x7b, 0x3a, 0x4e, 0x0f, 0x5d, 0x1c, 0x2d, 0x6c, 0x3e, 0x7f, + 0x0b, 0x4a, 0x18, 0x59, 0x61, 0x20, 0x72, 0x33, 0x47, 0x06, 0x54, 0x15, + 0x36, 0x77, 0x25, 0x64, 0x10, 0x51, 0x03, 0x42, 0x7a, 0x3b, 0x69, 0x28, + 0x5c, 0x1d, 0x4f, 0x0e, 0x3f, 0x7e, 0x2c, 0x6d, 0x19, 0x58, 0x0a, 0x4b, + 0x73, 0x32, 0x60, 0x21, 0x55, 0x14, 0x46, 0x07, 0x48, 0x09, 0x5b, 0x1a, + 0x6e, 0x2f, 0x7d, 0x3c, 0x04, 0x45, 0x17, 0x56, 0x22, 0x63, 0x31, 0x70, + 0x41, 0x00, 0x52, 0x13, 0x67, 0x26, 0x74, 0x35, 0x0d, 0x4c, 0x1e, 0x5f, + 0x2b, 0x6a, 0x38, 0x79, 0x5a, 0x1b, 0x49, 0x08, 0x7c, 0x3d, 0x6f, 0x2e, + 0x16, 0x57, 0x05, 0x44, 0x30, 0x71, 0x23, 0x62, 0x53, 0x12, 0x40, 0x01, + 0x75, 0x34, 0x66, 0x27, 0x1f, 0x5e, 0x0c, 0x4d, 0x39, 0x78, 0x2a, 0x6b, + 0x6c, 0x2d, 0x7f, 0x3e, 0x4a, 0x0b, 0x59, 0x18, 0x20, 0x61, 0x33, 0x72, + 0x06, 0x47, 0x15, 0x54, 0x65, 0x24, 0x76, 0x37, 0x43, 0x02, 0x50, 0x11, + 0x29, 0x68, 0x3a, 0x7b, 0x0f, 0x4e, 0x1c, 0x5d, 0x7e, 0x3f, 0x6d, 0x2c, + 0x58, 0x19, 0x4b, 0x0a, 0x32, 0x73, 0x21, 0x60, 0x14, 0x55, 0x07, 0x46, + 0x77, 0x36, 0x64, 0x25, 0x51, 0x10, 0x42, 0x03, 0x3b, 0x7a, 0x28, 0x69, + 0x1d, 0x5c, 0x0e, 0x4f}; + +static uint8_t +zsda_crc8(const uint8_t *message, const int length) +{ + uint8_t crc = 0; + int i; + + for (i = 0; i < length; i++) + crc = crc8_table[crc ^ message[i]]; + return crc; +} + +uint32_t +zsda_set_reg_8(void *addr, const uint8_t val0, const uint8_t val1, + const uint8_t val2, const uint8_t val3) +{ + uint8_t val[4]; + + val[0] = val0; + val[1] = val1; + val[2] = val2; + val[3] = val3; + ZSDA_CSR_WRITE32(addr, *(uint32_t *)val); + return *(uint32_t *)val; +} + +uint8_t +zsda_get_reg_8(void *addr, const int offset) +{ + uint32_t val = ZSDA_CSR_READ32(addr); + + return *(((uint8_t *)&val) + offset); +} + +int +zsda_admin_msg_init(const struct rte_pci_device *pci_dev) +{ + uint8_t *mmio_base = pci_dev->mem_resource[0].addr; + + zsda_set_reg_8(mmio_base + ZSDA_ADMIN_WQ_BASE7, 0, 0, MAGIC_RECV, 0); + zsda_set_reg_8(mmio_base + ZSDA_ADMIN_CQ_BASE7, 0, 0, MAGIC_RECV, 0); + return 0; +} + +int +zsda_send_admin_msg(const struct rte_pci_device *pci_dev, void *req, + const uint32_t len) +{ + uint8_t *mmio_base = pci_dev->mem_resource[0].addr; + uint8_t wq_flag; + uint8_t crc; + uint16_t admin_db; + uint32_t retry = ZSDA_TIME_NUM; + int i; + uint16_t db; + int repeat = sizeof(struct zsda_admin_req) / sizeof(uint32_t); + + if (len > ADMIN_BUF_DATA_LEN) + return -EINVAL; + + for (i = 0; i < repeat; i++) { + ZSDA_CSR_WRITE32(((uint32_t *)(mmio_base + ZSDA_ADMIN_WQ) + i), + *((uint32_t *)req + i)); + } + + crc = zsda_crc8((uint8_t *)req, ADMIN_BUF_DATA_LEN); + zsda_set_reg_8(mmio_base + ZSDA_ADMIN_WQ_BASE7, crc, ADMIN_VER, MAGIC_SEND, 0); + rte_delay_us_sleep(ZSDA_TIME_SLEEP_US); + rte_wmb(); + + admin_db = ZSDA_CSR_READ32(mmio_base + ZSDA_ADMIN_WQ_TAIL); + db = zsda_modulo_32(admin_db, 0x1ff); + ZSDA_CSR_WRITE32(mmio_base + ZSDA_ADMIN_WQ_TAIL, db); + + do { + rte_delay_us_sleep(ZSDA_TIME_SLEEP_US); + wq_flag = zsda_get_reg_8(mmio_base + ZSDA_ADMIN_WQ_BASE7, 2); + if (wq_flag == MAGIC_RECV) + break; + + retry--; + if (!retry) { + ZSDA_LOG(ERR, "wq_flag 0x%X", wq_flag); + zsda_set_reg_8(mmio_base + ZSDA_ADMIN_WQ_BASE7, 0, crc, + ADMIN_VER, 0); + return -EIO; + } + } while (1); + + return ZSDA_SUCCESS; +} + +int +zsda_recv_admin_msg(const struct rte_pci_device *pci_dev, void *resp, + const uint32_t len) +{ + uint8_t *mmio_base = pci_dev->mem_resource[0].addr; + uint8_t cq_flag; + uint32_t retry = ZSDA_TIME_NUM; + uint8_t crc; + uint8_t buf[ADMIN_BUF_TOTAL_LEN] = {0}; + uint32_t i; + + if (len > ADMIN_BUF_DATA_LEN) + return -EINVAL; + + do { + rte_delay_us_sleep(ZSDA_TIME_SLEEP_US); + + cq_flag = zsda_get_reg_8(mmio_base + ZSDA_ADMIN_CQ_BASE7, 2); + if (cq_flag == MAGIC_SEND) + break; + + retry--; + if (!retry) + return -EIO; + } while (1); + + for (i = 0; i < len; i++) + buf[i] = ZSDA_CSR_READ8(mmio_base + ZSDA_ADMIN_CQ + i); + + crc = ZSDA_CSR_READ8(mmio_base + ZSDA_ADMIN_CQ_CRC); + rte_rmb(); + ZSDA_CSR_WRITE8(mmio_base + ZSDA_ADMIN_CQ_FLAG, MAGIC_RECV); + if (crc != zsda_crc8(buf, ADMIN_BUF_DATA_LEN)) { + ZSDA_LOG(ERR, "[%d] Failed! crc error!", __LINE__); + return -EIO; + } + + memcpy(resp, buf, len); + + return ZSDA_SUCCESS; +} + +int +zsda_fill_sgl(const struct rte_mbuf *buf, uint32_t offset, struct zsda_sgl *sgl, + const phys_addr_t sgl_phy_addr, uint32_t remain_len, + struct comp_head_info *comp_head_info) +{ + uint32_t nr; + uint16_t put_in_len; + bool head_set = false; + + for (nr = 0; (buf && (nr < (ZSDA_SGL_MAX_NUMBER - 1)));) { + if (offset >= rte_pktmbuf_data_len(buf)) { + offset -= rte_pktmbuf_data_len(buf); + buf = buf->next; + continue; + } + memset(&(sgl->buffers[nr]), 0, sizeof(struct zsda_buf)); + if ((nr > 0) && (((nr + 1) % ZSDA_SGL_FRAGMENT_SIZE) == 0) && + (buf->next != NULL)) { + sgl->buffers[nr].len = SGL_TYPE_PHYS_ADDR; + sgl->buffers[nr].addr = + sgl_phy_addr + + ((nr + 1) * sizeof(struct zsda_buf)); + sgl->buffers[nr].type = SGL_TYPE_NEXT_LIST; + ++nr; + continue; + } + if (comp_head_info && !head_set) { + sgl->buffers[nr].len = comp_head_info->head_len; + sgl->buffers[nr].addr = comp_head_info->head_phys_addr; + sgl->buffers[nr].type = SGL_TYPE_PHYS_ADDR; + ++nr; + head_set = true; + remain_len -= comp_head_info->head_len; + continue; + } else { + put_in_len = rte_pktmbuf_data_len(buf) - (offset & 0xffff); + if (remain_len <= put_in_len) + put_in_len = remain_len; + remain_len -= put_in_len; + + sgl->buffers[nr].len = put_in_len; + sgl->buffers[nr].addr = rte_pktmbuf_iova_offset(buf, offset); + sgl->buffers[nr].type = SGL_TYPE_PHYS_ADDR; + } + offset = 0; + ++nr; + buf = buf->next; + + if (remain_len == 0) + break; + } + + if (nr == 0) { + ZSDA_LOG(ERR, "In fill_sgl, nr == 0"); + return ZSDA_FAILED; + } + + sgl->buffers[nr - 1].type = SGL_TYPE_LAST_PHYS_ADDR; + + if (buf) { + if (unlikely(buf->next)) { + if (nr == (ZSDA_SGL_MAX_NUMBER - 1)) { + ZSDA_LOG(ERR, "ERR! segs size (%u)", + (ZSDA_SGL_MAX_NUMBER)); + return -EINVAL; + } + } + } + + return ZSDA_SUCCESS; +} diff --git a/drivers/common/zsda/zsda_common.h b/drivers/common/zsda/zsda_common.h new file mode 100644 index 0000000000..ddc5c83093 --- /dev/null +++ b/drivers/common/zsda/zsda_common.h @@ -0,0 +1,331 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 ZTE Corporation + */ + +#ifndef _ZSDA_COMMON_H_ +#define _ZSDA_COMMON_H_ + +#include <stdint.h> + +#include <rte_bus_pci.h> +#include <rte_mbuf.h> +#include <rte_io.h> + +#include "zsda_logs.h" + +#define ZSDA_DEV_NAME_MAX_LEN 64 +#define MAX_QPS_ON_FUNCTION 128 + +#define ADMIN_WQ_BASE_ADDR_0 0x40 +#define ADMIN_WQ_BASE_ADDR_1 0x44 +#define ADMIN_WQ_BASE_ADDR_2 0x48 +#define ADMIN_WQ_BASE_ADDR_3 0x4C +#define ADMIN_WQ_BASE_ADDR_4 0x50 +#define ADMIN_WQ_BASE_ADDR_5 0x54 +#define ADMIN_WQ_BASE_ADDR_6 0x58 +#define ADMIN_WQ_BASE_ADDR_7 0x5C + +#define ADMIN_CQ_BASE_ADDR_0 0x60 +#define ADMIN_CQ_BASE_ADDR_1 0x64 +#define ADMIN_CQ_BASE_ADDR_2 0x68 +#define ADMIN_CQ_BASE_ADDR_3 0x6C +#define ADMIN_CQ_BASE_ADDR_4 0x70 +#define ADMIN_CQ_BASE_ADDR_5 0x74 +#define ADMIN_CQ_BASE_ADDR_6 0x78 +#define ADMIN_CQ_BASE_ADDR_7 0x7C + +#define IO_DB_INITIAL_CONFIG 0x1C00 + +#define ADMIN_BUF_DATA_LEN 0x1C +#define ADMIN_BUF_TOTAL_LEN 0x20 + +#define ZSDA_CSR_VERSION 0x0 +#define ZSDA_ADMIN_WQ 0x40 +#define ZSDA_ADMIN_WQ_BASE7 0x5C +#define ZSDA_ADMIN_WQ_CRC 0x5C +#define ZSDA_ADMIN_WQ_VERSION 0x5D +#define ZSDA_ADMIN_WQ_FLAG 0x5E +#define ZSDA_ADMIN_CQ 0x60 +#define ZSDA_ADMIN_CQ_BASE7 0x7C +#define ZSDA_ADMIN_CQ_CRC 0x7C +#define ZSDA_ADMIN_CQ_VERSION 0x7D +#define ZSDA_ADMIN_CQ_FLAG 0x7E + +#define ZSDA_ADMIN_WQ_TAIL 0x80 +#define ZSDA_ADMIN_CQ_HEAD 0x84 + +#define ZSDA_ADMIN_Q_START 0x100 +#define ZSDA_ADMIN_Q_STOP 0x100 +#define ZSDA_ADMIN_Q_STOP_RESP 0x104 +#define ZSDA_ADMIN_Q_CLR 0x108 +#define ZSDA_ADMIN_Q_CLR_RESP 0x10C + +#define ZSDA_IO_Q_START 0x200 +#define ZSDA_IO_Q_STOP 0x200 +#define ZSDA_IO_Q_STOP_RESP 0x400 +#define ZSDA_IO_Q_CLR 0x600 +#define ZSDA_IO_Q_CLR_RESP 0x800 + +#define ZSDA_CSR_READ32(addr) rte_read32((addr)) +#define ZSDA_CSR_WRITE32(addr, value) rte_write32((value), (addr)) +#define ZSDA_CSR_READ16(addr) rte_read16((addr)) +#define ZSDA_CSR_WRITE16(addr, value) rte_write16((value), (addr)) +#define ZSDA_CSR_READ8(addr) rte_read8((addr)) +#define ZSDA_CSR_WRITE8(addr, value) rte_write8_relaxed((value), (addr)) + +#define ZSDA_PCI_NAME zsda +#define ZSDA_SGL_MAX_NUMBER 512 +#define ZSDA_SGL_FRAGMENT_SIZE 32 +#define NB_DES 512 + +#define ZSDA_SUCCESS EXIT_SUCCESS +#define ZSDA_FAILED (-1) + +#define E_NULL "Failed! Addr is NULL" +#define E_CREATE "Failed! Create" +#define E_FUNC "Failed! Function" +#define E_START_Q "Failed! START q" +#define E_MALLOC "Failed! malloc" +#define E_FREE "Failed! free" +#define E_CONFIG "Failed! config" + +#ifndef RTE_CRYPTO_CIPHER_SM4_XTS +#define RTE_CRYPTO_CIPHER_SM4_XTS 22 +#endif + +enum zsda_service_type { + ZSDA_SERVICE_COMPRESSION = 0, + ZSDA_SERVICE_DECOMPRESSION, + ZSDA_SERVICE_SYMMETRIC_ENCRYPT, + ZSDA_SERVICE_SYMMETRIC_DECRYPT, + ZSDA_SERVICE_HASH_ENCODE = 6, + ZSDA_SERVICE_INVALID, +}; + +#define ZSDA_MAX_SERVICES (ZSDA_SERVICE_INVALID) + +#define ZSDA_OPC_EC_AES_XTS_256 0x0 /* Encry AES-XTS-256 */ +#define ZSDA_OPC_EC_AES_XTS_512 0x01 /* Encry AES-XTS-512 */ +#define ZSDA_OPC_EC_SM4_XTS_256 0x02 /* Encry SM4-XTS-256 */ +#define ZSDA_OPC_DC_AES_XTS_256 0x08 /* Decry AES-XTS-256 */ +#define ZSDA_OPC_DC_AES_XTS_512 0x09 /* Decry AES-XTS-512 */ +#define ZSDA_OPC_DC_SM4_XTS_256 0x0A /* Decry SM4-XTS-256 */ +#define ZSDA_OPC_COMP_GZIP 0x10 /* Encomp deflate-Gzip */ +#define ZSDA_OPC_COMP_ZLIB 0x11 /* Encomp deflate-Zlib */ +#define ZSDA_OPC_DECOMP_GZIP 0x18 /* Decompinfalte-Gzip */ +#define ZSDA_OPC_DECOMP_ZLIB 0x19 /* Decompinfalte-Zlib */ +#define ZSDA_OPC_HASH_SHA1 0x20 /* Hash-SHA1 */ +#define ZSDA_OPC_HASH_SHA2_224 0x21 /* Hash-SHA2-224 */ +#define ZSDA_OPC_HASH_SHA2_256 0x22 /* Hash-SHA2-256 */ +#define ZSDA_OPC_HASH_SHA2_384 0x23 /* Hash-SHA2-384 */ +#define ZSDA_OPC_HASH_SHA2_512 0x24 /* Hash-SHA2-512 */ +#define ZSDA_OPC_HASH_SM3 0x25 /* Hash-SM3 */ +#define ZSDA_OPC_INVALID 0xff + +#define ZSDA_DIGEST_SIZE_SHA1 (20) +#define ZSDA_DIGEST_SIZE_SHA2_224 (28) +#define ZSDA_DIGEST_SIZE_SHA2_256 (32) +#define ZSDA_DIGEST_SIZE_SHA2_384 (48) +#define ZSDA_DIGEST_SIZE_SHA2_512 (64) +#define ZSDA_DIGEST_SIZE_SM3 (32) + +#define SET_CYCLE 0xff +#define SET_HEAD_INTI 0x0 + +#define ZSDA_Q_START 0x1 +#define ZSDA_Q_STOP 0x0 +#define ZSDA_CLEAR_VALID 0x1 +#define ZSDA_CLEAR_INVALID 0x0 +#define ZSDA_RESP_VALID 0x1 +#define ZSDA_RESP_INVALID 0x0 + +#define ZSDA_TIME_SLEEP_US 100 +#define ZSDA_TIME_NUM 500 + +#define ZSDA_MAX_DESC 512 +#define ZSDA_MAX_CYCLE 256 +#define ZSDA_MAX_DEV 256 +#define MAX_NUM_OPS 0x1FF + +struct zsda_pci_device; + +enum sgl_element_type_wqe { + SGL_ELM_TYPE_PHYS_ADDR = 1, + SGL_ELM_TYPE_LIST, + SGL_ELM_TYPE_LIST_ADDR, + SGL_ELM_TYPE_LIST_SGL32, +}; + +enum sgl_element_type { + SGL_TYPE_PHYS_ADDR = 0, + SGL_TYPE_LAST_PHYS_ADDR, + SGL_TYPE_NEXT_LIST, + SGL_TYPE_EC_LEVEL1_SGL32, +}; + +enum zsda_admin_msg_id { + /* Version information */ + ZSDA_ADMIN_VERSION_REQ = 0, + ZSDA_ADMIN_VERSION_RESP, + /* algo type */ + ZSDA_ADMIN_QUEUE_CFG_REQ, + ZSDA_ADMIN_QUEUE_CFG_RESP, + /* get cycle */ + ZSDA_ADMIN_QUEUE_CYCLE_REQ, + ZSDA_ADMIN_QUEUE_CYCLE_RESP, + /* set cyclr */ + ZSDA_ADMIN_SET_CYCLE_REQ, + ZSDA_ADMIN_SET_CYCLE_RESP, + + ZSDA_MIG_STATE_WARNING, + ZSDA_ADMIN_RESERVE, + /* set close flr register */ + ZSDA_FLR_SET_FUNCTION, + ZSDA_ADMIN_MSG_VALID, + ZSDA_ADMIN_INT_TEST +}; + +struct zsda_admin_req { + uint16_t msg_type; + uint8_t data[26]; +}; + +struct zsda_admin_resp { + uint16_t msg_type; + uint8_t data[26]; +}; + +struct zsda_test_msg { + uint32_t msg_type; + uint32_t data_in; + uint8_t data[20]; +}; + +struct zsda_admin_req_qcfg { + uint16_t msg_type; + uint8_t qid; + uint8_t data[25]; +}; + +struct qinfo { + uint16_t q_type; + uint16_t wq_tail; + uint16_t wq_head; + uint16_t cq_tail; + uint16_t cq_head; + uint16_t cycle; +} __rte_packed; + +struct zsda_admin_resp_qcfg { + uint16_t msg_type; + struct qinfo qcfg; + uint8_t data[14]; +} __rte_packed; + +enum flr_clr_mask { + unmask = 0, + mask, +}; + +/**< Common struct for scatter-gather list operations */ +struct zsda_buf { + uint64_t addr; + uint32_t len; + uint8_t resrvd[3]; + uint8_t type; +} __rte_packed; + +struct __rte_cache_aligned zsda_sgl { + struct zsda_buf buffers[ZSDA_SGL_MAX_NUMBER]; +}; + +/* The space length. The space is used for compression header and tail */ +#define COMP_REMOVE_SPACE_LEN 16 + +struct zsda_op_cookie { + struct zsda_sgl sgl_src; + struct zsda_sgl sgl_dst; + phys_addr_t sgl_src_phys_addr; + phys_addr_t sgl_dst_phys_addr; + phys_addr_t comp_head_phys_addr; + uint8_t comp_head[COMP_REMOVE_SPACE_LEN]; + uint16_t sid; + bool used; + bool decomp_no_tail; + void *op; +}; + +struct zsda_cqe { + uint8_t valid; /* cqe_cycle */ + uint8_t op_code; + uint16_t sid; + uint8_t state; + uint8_t result; + uint16_t zsda_wq_id; + uint32_t tx_real_length; + uint16_t err0; + uint16_t err1; +} __rte_packed; + +struct zsda_common_stat { + /**< Count of all operations enqueued */ + uint64_t enqueued_count; + /**< Count of all operations dequeued */ + uint64_t dequeued_count; + + /**< Total error count on operations enqueued */ + uint64_t enqueue_err_count; + /**< Total error count on operations dequeued */ + uint64_t dequeue_err_count; +}; + +enum zsda_algo_core { + ZSDA_CORE_COMP, + ZSDA_CORE_DECOMP, + ZSDA_CORE_ENCRY, + ZSDA_CORE_DECRY, + ZSDA_CORE_HASH, + ZSDA_CORE_INVALID, +}; + +struct comp_head_info { + uint32_t head_len; + phys_addr_t head_phys_addr; +}; + +static inline uint32_t +zsda_modulo_32(uint32_t data, uint32_t modulo_mask) +{ + return (data) & (modulo_mask); +} +static inline uint16_t +zsda_modulo_16(uint16_t data, uint16_t modulo_mask) +{ + return (data) & (modulo_mask); +} +static inline uint8_t +zsda_modulo_8(uint8_t data, uint8_t modulo_mask) +{ + return (data) & (modulo_mask); +} + +#define CQE_VALID(value) (value & 0x8000) +#define CQE_ERR0(value) (value & 0xffff) +#define CQE_ERR1(value) (value & 0x7fff) + +uint32_t zsda_set_reg_8(void *addr, const uint8_t val0, const uint8_t val1, + const uint8_t val2, const uint8_t val3); +uint8_t zsda_get_reg_8(void *addr, const int offset); + +int zsda_admin_msg_init(const struct rte_pci_device *pci_dev); +int zsda_send_admin_msg(const struct rte_pci_device *pci_dev, void *req, + const uint32_t len); + +int zsda_recv_admin_msg(const struct rte_pci_device *pci_dev, void *resp, + const uint32_t len); + +int zsda_fill_sgl(const struct rte_mbuf *buf, uint32_t offset, + struct zsda_sgl *sgl, const phys_addr_t sgl_phy_addr, + uint32_t remain_len, struct comp_head_info *comp_head_info); + +#endif /* _ZSDA_COMMON_H_ */ diff --git a/drivers/common/zsda/zsda_device.c b/drivers/common/zsda/zsda_device.c new file mode 100644 index 0000000000..5af3dcc3c9 --- /dev/null +++ b/drivers/common/zsda/zsda_device.c @@ -0,0 +1,263 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 ZTE Corporation + */ + + +#include <errno.h> +#include <stdint.h> + +#include "zsda_device.h" + +/* per-process array of device data */ +struct zsda_device_info zsda_devs[RTE_PMD_ZSDA_MAX_PCI_DEVICES]; +static int zsda_nb_pci_devices; + +/* + * The set of PCI devices this driver supports + */ +static const struct rte_pci_id pci_id_zsda_map[] = { + { + RTE_PCI_DEVICE(0x1cf2, 0x8050), + }, + { + RTE_PCI_DEVICE(0x1cf2, 0x8051), + }, + {.device_id = 0}, +}; + +static struct zsda_pci_device * +zsda_pci_get_named_dev(const char *name) +{ + unsigned int i; + + if (name == NULL) { + ZSDA_LOG(ERR, E_NULL); + return NULL; + } + + for (i = 0; i < RTE_PMD_ZSDA_MAX_PCI_DEVICES; i++) { + if (zsda_devs[i].mz && + (strcmp(((struct zsda_pci_device *)zsda_devs[i].mz->addr) + ->name, + name) == 0)) + return (struct zsda_pci_device *)zsda_devs[i].mz->addr; + } + + return NULL; +} + +static uint8_t +zsda_pci_find_free_device_index(void) +{ + uint32_t dev_id; + + for (dev_id = 0; dev_id < RTE_PMD_ZSDA_MAX_PCI_DEVICES; dev_id++) + if (zsda_devs[dev_id].mz == NULL) + break; + + return dev_id & (ZSDA_MAX_DEV - 1); +} + +struct zsda_pci_device * +zsda_get_zsda_dev_from_pci_dev(const struct rte_pci_device *pci_dev) +{ + char name[ZSDA_DEV_NAME_MAX_LEN]; + + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + return zsda_pci_get_named_dev(name); +} + +struct zsda_pci_device * +zsda_pci_device_allocate(struct rte_pci_device *pci_dev) +{ + struct zsda_pci_device *zsda_pci_dev; + uint8_t zsda_dev_id; + char name[ZSDA_DEV_NAME_MAX_LEN]; + unsigned int socket_id = rte_socket_id(); + + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + snprintf(name + strlen(name), (ZSDA_DEV_NAME_MAX_LEN - strlen(name)), + "_zsda"); + if (rte_eal_process_type() == RTE_PROC_SECONDARY) { + const struct rte_memzone *mz = rte_memzone_lookup(name); + + if (mz == NULL) { + ZSDA_LOG(ERR, "Secondary can't find %s mz", name); + return NULL; + } + zsda_pci_dev = mz->addr; + zsda_devs[zsda_pci_dev->zsda_dev_id].mz = mz; + zsda_devs[zsda_pci_dev->zsda_dev_id].pci_dev = pci_dev; + zsda_nb_pci_devices++; + return zsda_pci_dev; + } + + if (zsda_pci_get_named_dev(name) != NULL) { + ZSDA_LOG(ERR, E_CONFIG); + return NULL; + } + + zsda_dev_id = zsda_pci_find_free_device_index(); + + if (zsda_dev_id == (RTE_PMD_ZSDA_MAX_PCI_DEVICES - 1)) { + ZSDA_LOG(ERR, "Reached maximum number of ZSDA devices"); + return NULL; + } + + zsda_devs[zsda_dev_id].mz = + rte_memzone_reserve(name, sizeof(struct zsda_pci_device), + (int)(socket_id & 0xfff), 0); + + if (zsda_devs[zsda_dev_id].mz == NULL) { + ZSDA_LOG(ERR, E_MALLOC); + return NULL; + } + + zsda_pci_dev = zsda_devs[zsda_dev_id].mz->addr; + memset(zsda_pci_dev, 0, sizeof(*zsda_pci_dev)); + strlcpy(zsda_pci_dev->name, name, ZSDA_DEV_NAME_MAX_LEN); + zsda_pci_dev->zsda_dev_id = zsda_dev_id; + zsda_pci_dev->pci_dev = pci_dev; + zsda_devs[zsda_dev_id].pci_dev = pci_dev; + + zsda_nb_pci_devices++; + + return zsda_pci_dev; +} + +static int +zsda_pci_device_release(const struct rte_pci_device *pci_dev) +{ + struct zsda_pci_device *zsda_pci_dev; + struct zsda_device_info *inst; + char name[ZSDA_DEV_NAME_MAX_LEN]; + + if (pci_dev == NULL) + return -EINVAL; + + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + snprintf(name + strlen(name), + ZSDA_DEV_NAME_MAX_LEN - (strlen(name) - 1), "_zsda"); + zsda_pci_dev = zsda_pci_get_named_dev(name); + if (zsda_pci_dev != NULL) { + inst = &zsda_devs[zsda_pci_dev->zsda_dev_id]; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + if ((zsda_pci_dev->sym_dev != NULL) || + (zsda_pci_dev->comp_dev != NULL)) { + ZSDA_LOG(DEBUG, "ZSDA device %s is busy", name); + return -EBUSY; + } + rte_memzone_free(inst->mz); + } + memset(inst, 0, sizeof(struct zsda_device_info)); + zsda_nb_pci_devices--; + } + return 0; +} + +static int +zsda_pci_dev_destroy(struct zsda_pci_device *zsda_pci_dev, + const struct rte_pci_device *pci_dev) +{ + zsda_sym_dev_destroy(zsda_pci_dev); + zsda_comp_dev_destroy(zsda_pci_dev); + + return zsda_pci_device_release(pci_dev); +} + +static int +zsda_unmask_flr(const struct zsda_pci_device *zsda_pci_dev) +{ + struct zsda_admin_req_qcfg req = {0}; + struct zsda_admin_resp_qcfg resp = {0}; + + int ret = 0; + struct rte_pci_device *pci_dev = + zsda_devs[zsda_pci_dev->zsda_dev_id].pci_dev; + + zsda_admin_msg_init(pci_dev); + + req.msg_type = ZSDA_FLR_SET_FUNCTION; + + ret = zsda_send_admin_msg(pci_dev, &req, sizeof(req)); + if (ret) { + ZSDA_LOG(ERR, "Failed! Send msg"); + return ret; + } + + ret = zsda_recv_admin_msg(pci_dev, &resp, sizeof(resp)); + if (ret) { + ZSDA_LOG(ERR, "Failed! Receive msg"); + return ret; + } + + return ZSDA_SUCCESS; +} + +static int +zsda_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *pci_dev) +{ + int ret = 0; + struct zsda_pci_device *zsda_pci_dev; + + zsda_pci_dev = zsda_pci_device_allocate(pci_dev); + if (zsda_pci_dev == NULL) { + ZSDA_LOG(ERR, E_NULL); + return -ENODEV; + } + + ret = zsda_queue_init(zsda_pci_dev); + if (ret) { + ZSDA_LOG(ERR, "Failed! queue init."); + return ret; + } + + ret = zsda_unmask_flr(zsda_pci_dev); + if (ret) { + ZSDA_LOG(ERR, "Failed! flr close."); + return ret; + } + + ret = zsda_sym_dev_create(zsda_pci_dev); + ret |= zsda_comp_dev_create(zsda_pci_dev); + if (ret) { + ZSDA_LOG(ERR, "Failed! dev create."); + zsda_pci_dev_destroy(zsda_pci_dev, pci_dev); + return ret; + } + + return ret; +} + +static int +zsda_pci_remove(struct rte_pci_device *pci_dev) +{ + struct zsda_pci_device *zsda_pci_dev; + + if (pci_dev == NULL) + return -EINVAL; + + zsda_pci_dev = zsda_get_zsda_dev_from_pci_dev(pci_dev); + if (zsda_pci_dev == NULL) + return 0; + + if (zsda_queue_remove(zsda_pci_dev)) + ZSDA_LOG(ERR, "Failed! q remove"); + + return zsda_pci_dev_destroy(zsda_pci_dev, pci_dev); +} + +static struct rte_pci_driver rte_zsda_pmd = { + .id_table = pci_id_zsda_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING, + .probe = zsda_pci_probe, + .remove = zsda_pci_remove }; + +RTE_PMD_REGISTER_PCI(ZSDA_PCI_NAME, rte_zsda_pmd); +RTE_PMD_REGISTER_PCI_TABLE(ZSDA_PCI_NAME, pci_id_zsda_map); +RTE_PMD_REGISTER_KMOD_DEP(ZSDA_PCI_NAME, + "* igb_uio | uio_pci_generic | vfio-pci"); diff --git a/drivers/common/zsda/zsda_device.h b/drivers/common/zsda/zsda_device.h new file mode 100644 index 0000000000..80ce4d4502 --- /dev/null +++ b/drivers/common/zsda/zsda_device.h @@ -0,0 +1,123 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 ZTE Corporation + */ + +#ifndef _ZSDA_DEVICE_H_ +#define _ZSDA_DEVICE_H_ + +#include "bus_pci_driver.h" + +#include "zsda_common.h" +#include "zsda_logs.h" + +struct zsda_device_info { + const struct rte_memzone *mz; + /**< mz to store the： struct zsda_pci_device , so it can be + * shared across processes + */ + + struct rte_pci_device *pci_dev; + + struct rte_device sym_rte_dev; + /**< This represents the crypto sym subset of this pci device. + * Register with this rather than with the one in + * pci_dev so that its driver can have a crypto-specific name + */ + + struct rte_device comp_rte_dev; + /**< This represents the compression subset of this pci device. + * Register with this rather than with the one in + * pci_dev so that its driver can have a compression-specific name + */ +}; + +extern struct zsda_device_info zsda_devs[]; + +struct zsda_sym_dev_private; +struct zsda_comp_dev_private; + +struct zsda_qp_hw_data { + bool used; + + uint8_t tx_ring_num; + uint8_t rx_ring_num; + uint16_t tx_msg_size; + uint16_t rx_msg_size; +}; + +struct zsda_qp_hw { + struct zsda_qp_hw_data data[MAX_QPS_ON_FUNCTION]; +}; + +/* + * This struct holds all the data about a ZSDA pci device + * including data about all services it supports. + * It contains + * - hw_data + * - config data + * - runtime data + * Note: as this data can be shared in a multi-process scenario, + * any pointers in it must also point to shared memory. + */ +struct zsda_pci_device { + /* Data used by all services */ + char name[ZSDA_DEV_NAME_MAX_LEN]; + /**< Name of zsda pci device */ + uint8_t zsda_dev_id; + /**< Id of device instance for this zsda pci device */ + + struct rte_pci_device *pci_dev; + + /* Data relating to symmetric crypto service */ + struct zsda_sym_dev_private *sym_dev; + /**< link back to cryptodev private data */ + + /* Data relating to compression service */ + struct zsda_comp_dev_private *comp_dev; + /**< link back to compressdev private data */ + + struct zsda_qp_hw zsda_hw_qps[ZSDA_MAX_SERVICES]; + uint16_t zsda_qp_hw_num[ZSDA_MAX_SERVICES]; +}; + +struct zsda_pci_device * +zsda_pci_device_allocate(struct rte_pci_device *pci_dev); + +struct zsda_pci_device * +zsda_get_zsda_dev_from_pci_dev(const struct rte_pci_device *pci_dev); + +__rte_weak int +zsda_admin_msg_init(const struct rte_pci_device *pci_dev); + +__rte_weak int +zsda_send_admin_msg(const struct rte_pci_device *pci_dev, void *req, + const uint32_t len); + +__rte_weak int +zsda_recv_admin_msg(const struct rte_pci_device *pci_dev, void *resp, + const uint32_t len); + +__rte_weak int +zsda_get_queue_cfg(struct zsda_pci_device *zsda_pci_dev); + +__rte_weak int +zsda_sym_dev_create(struct zsda_pci_device *zsda_pci_dev); + +__rte_weak int +zsda_sym_dev_destroy(struct zsda_pci_device *zsda_pci_dev); + +__rte_weak int +zsda_comp_dev_create(struct zsda_pci_device *zsda_pci_dev); + +__rte_weak int +zsda_comp_dev_destroy(struct zsda_pci_device *zsda_pci_dev); + +__rte_weak int +zsda_queue_init(struct zsda_pci_device *zsda_pci_dev); + +__rte_weak int +zsda_queue_remove(struct zsda_pci_device *zsda_pci_dev); + +int zsda_set_cycle_head_tail(struct zsda_pci_device *zsda_pci_dev); + +#endif /* _ZSDA_DEVICE_H_ */ diff --git a/drivers/common/zsda/zsda_logs.c b/drivers/common/zsda/zsda_logs.c new file mode 100644 index 0000000000..f76d9d9d0d --- /dev/null +++ b/drivers/common/zsda/zsda_logs.c @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 ZTE Corporation + */ + +#include <rte_hexdump.h> + +#include "zsda_logs.h" + +int +zsda_hexdump_log(uint32_t level, uint32_t logtype, const char *title, + const void *buf, unsigned int len) +{ + if (rte_log_can_log(logtype, level)) + rte_hexdump(rte_log_get_stream(), title, buf, len); + + return 0; +} + +RTE_LOG_REGISTER_SUFFIX(zsda_logtype_gen, gen, NOTICE); diff --git a/drivers/common/zsda/zsda_logs.h b/drivers/common/zsda/zsda_logs.h new file mode 100644 index 0000000000..9d77254773 --- /dev/null +++ b/drivers/common/zsda/zsda_logs.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 ZTE Corporation + */ + +#ifndef _ZSDA_LOGS_H_ +#define _ZSDA_LOGS_H_ + +#include <rte_log.h> + +extern int zsda_logtype_gen; +#define RTE_LOGTYPE_ZSDA_GEN zsda_logtype_gen + +#define ZSDA_LOG(level, ...) \ + RTE_LOG_LINE_PREFIX(level, ZSDA_GEN, "%s(): ", \ + __func__, __VA_ARGS__) + +/** + * zsda_hexdump_log - Dump out memory in a special hex dump format. + * + * Dump out the message buffer in a special hex dump output format with + * characters printed for each line of 16 hex values. The message will be sent + * to the stream used by the rte_log infrastructure. + */ +int zsda_hexdump_log(uint32_t level, uint32_t logtype, const char *title, + const void *buf, unsigned int len); + +#endif /* _ZSDA_LOGS_H_ */ -- 2.27.0