Add compatibility check between (np)network processor<br />software and firmware.<br /> <br />Signed-off-by: Bingbin Chen <chen.bingbin@zte.com.cn> <br />---<br /> drivers/net/zxdh/zxdh_np.c | 93 ++++++++++++++++++++++++++++++++++++++<br /> drivers/net/zxdh/zxdh_np.h | 12 +++++<br /> 2 files changed, 105 insertions(+)<br /> <br />diff --git a/drivers/net/zxdh/zxdh_np.c b/drivers/net/zxdh/zxdh_np.c<br />index cbab2a3aaa..538e3829aa 100644<br />--- a/drivers/net/zxdh/zxdh_np.c<br />+++ b/drivers/net/zxdh/zxdh_np.c<br />@@ -23,6 +23,9 @@ ZXDH_DTB_MGR_T *p_dpp_dtb_mgr[ZXDH_DEV_CHANNEL_MAX];<br /> ZXDH_RISCV_DTB_MGR *p_riscv_dtb_queue_mgr[ZXDH_DEV_CHANNEL_MAX];<br /> ZXDH_SDT_TBL_DATA_T g_sdt_info[ZXDH_DEV_CHANNEL_MAX][ZXDH_DEV_SDT_ID_MAX];<br /> ZXDH_PPU_STAT_CFG_T g_ppu_stat_cfg;<br />+static uint64_t g_np_fw_compat_addr[ZXDH_DEV_CHANNEL_MAX];<br />+static ZXDH_VERSION_COMPATIBLE_REG_T g_np_sdk_version = {<br />+    ZXDH_NPSDK_COMPAT_ITEM_ID, 1, 0, 0, 0, {0} };<br />  <br /> ZXDH_FIELD_T g_smmu0_smmu0_cpu_ind_cmd_reg[] = {<br />     {"cpu_ind_rw", ZXDH_FIELD_FLAG_RW, 31, 1, 0x0, 0x0},<br />@@ -965,6 +968,91 @@ zxdh_np_addr_calc(uint64_t pcie_vir_baddr, uint32_t bar_offset)<br />     return np_addr;<br /> }<br />  <br />+static uint64_t<br />+zxdh_np_fw_compatible_addr_calc(uint64_t pcie_vir_baddr, uint64_t compatible_offset)<br />+{<br />+    return (pcie_vir_baddr + compatible_offset);<br />+}<br />+<br />+static void<br />+zxdh_np_pf_fw_compatible_addr_set(uint32_t dev_id, uint64_t pcie_vir_baddr)<br />+{<br />+    uint64_t compatible_offset = ZXDH_DPU_NO_DEBUG_PF_COMPAT_REG_OFFSET;<br />+    uint64_t compatible_addr = 0;<br />+<br />+    compatible_addr = zxdh_np_fw_compatible_addr_calc(pcie_vir_baddr, compatible_offset);<br />+<br />+    g_np_fw_compat_addr[dev_id] = compatible_addr;<br />+}<br />+<br />+static void<br />+zxdh_np_fw_compatible_addr_get(uint32_t dev_id, uint64_t *p_compatible_addr)<br />+{<br />+    *p_compatible_addr = g_np_fw_compat_addr[dev_id];<br />+}<br />+<br />+static void<br />+zxdh_np_fw_version_data_read(uint64_t compatible_base_addr,<br />+            ZXDH_VERSION_COMPATIBLE_REG_T *p_fw_version_data, uint32_t module_id)<br />+{<br />+    void *fw_addr = NULL;<br />+    uint64_t module_compatible_addr = 0;<br />+<br />+    module_compatible_addr = compatible_base_addr +<br />+        sizeof(ZXDH_VERSION_COMPATIBLE_REG_T) * (module_id - 1);<br />+<br />+    fw_addr = (void *)module_compatible_addr;<br />+<br />+    rte_memcpy(p_fw_version_data, fw_addr, sizeof(ZXDH_VERSION_COMPATIBLE_REG_T));<br />+}<br />+<br />+static void<br />+zxdh_np_fw_version_compatible_data_get(uint32_t dev_id,<br />+            ZXDH_VERSION_COMPATIBLE_REG_T *p_version_compatible_value,<br />+            uint32_t module_id)<br />+{<br />+    uint64_t compatible_addr = 0;<br />+<br />+    zxdh_np_fw_compatible_addr_get(dev_id, &compatible_addr);<br />+<br />+    zxdh_np_fw_version_data_read(compatible_addr, p_version_compatible_value, module_id);<br />+}<br />+<br />+static uint32_t<br />+zxdh_np_np_sdk_version_compatible_check(uint32_t dev_id)<br />+{<br />+    ZXDH_VERSION_COMPATIBLE_REG_T fw_version = {0};<br />+<br />+    zxdh_np_fw_version_compatible_data_get(dev_id, &fw_version, ZXDH_NPSDK_COMPAT_ITEM_ID);<br />+<br />+    if (fw_version.version_compatible_item != ZXDH_NPSDK_COMPAT_ITEM_ID) {<br />+        PMD_DRV_LOG(ERR, "version_compatible_item is not DH_NPSDK.");<br />+        return ZXDH_ERR;<br />+    }<br />+<br />+    if (g_np_sdk_version.major != fw_version.major) {<br />+        PMD_DRV_LOG(ERR, "dh_npsdk major:%hhu: is not match fw:%hhu!",<br />+            g_np_sdk_version.major, fw_version.major);<br />+        return ZXDH_ERR;<br />+    }<br />+<br />+    if (g_np_sdk_version.fw_minor > fw_version.fw_minor) {<br />+        PMD_DRV_LOG(ERR, "dh_npsdk fw_minor:%hhu is higher than fw:%hhu!",<br />+            g_np_sdk_version.fw_minor, fw_version.fw_minor);<br />+        return ZXDH_ERR;<br />+    }<br />+<br />+    if (g_np_sdk_version.drv_minor < fw_version.drv_minor) {<br />+        PMD_DRV_LOG(ERR, "dh_npsdk drv_minor:%hhu is lower than fw:%hhu!",<br />+            g_np_sdk_version.drv_minor, fw_version.drv_minor);<br />+        return ZXDH_ERR;<br />+    }<br />+<br />+    PMD_DRV_LOG(INFO, "dh_npsdk compatible check success!");<br />+<br />+    return ZXDH_OK;<br />+}<br />+<br /> static ZXDH_RISCV_DTB_MGR *<br /> zxdh_np_riscv_dtb_queue_mgr_get(uint32_t dev_id)<br /> {<br />@@ -2626,5 +2714,10 @@ zxdh_np_host_init(uint32_t dev_id,<br />     agent_addr = ZXDH_PCIE_AGENT_ADDR_OFFSET + p_dev_init_ctrl->pcie_vir_addr;<br />     zxdh_np_dev_agent_addr_set(dev_id, agent_addr);<br />  <br />+    zxdh_np_pf_fw_compatible_addr_set(dev_id, p_dev_init_ctrl->pcie_vir_addr);<br />+<br />+    rc = zxdh_np_np_sdk_version_compatible_check(dev_id);<br />+    ZXDH_COMM_CHECK_DEV_RC(dev_id, rc, "zxdh_np_np_sdk_version_compatible_check");<br />+<br />     return 0;<br /> }<br />diff --git a/drivers/net/zxdh/zxdh_np.h b/drivers/net/zxdh/zxdh_np.h<br />index 35130bdd1b..1df85bd382 100644<br />--- a/drivers/net/zxdh/zxdh_np.h<br />+++ b/drivers/net/zxdh/zxdh_np.h<br />@@ -112,6 +112,9 @@<br />  <br /> #define ZXDH_SE_OPR_RD                          (1)<br />  <br />+#define ZXDH_NPSDK_COMPAT_ITEM_ID               (10)<br />+#define ZXDH_DPU_NO_DEBUG_PF_COMPAT_REG_OFFSET  (0x5400)<br />+<br /> /**errco code */<br /> #define ZXDH_RC_BASE                            (0x1000U)<br /> #define ZXDH_PARAMETER_CHK_BASE                 (ZXDH_RC_BASE            | 0x200)<br />@@ -628,6 +631,15 @@ typedef enum zxdh_stat_cnt_mode_e {<br />     ZXDH_STAT_MAX_MODE,<br /> } ZXDH_STAT_CNT_MODE_E;<br />  <br />+typedef struct __rte_aligned(2) zxdh_version_compatible_reg_t {<br />+    uint8_t version_compatible_item;<br />+    uint8_t major;<br />+    uint8_t fw_minor;<br />+    uint8_t drv_minor;<br />+    uint16_t patch;<br />+    uint8_t rsv[2];<br />+} ZXDH_VERSION_COMPATIBLE_REG_T;<br />+<br /> int zxdh_np_host_init(uint32_t dev_id, ZXDH_DEV_INIT_CTRL_T *p_dev_init_ctrl);<br /> int zxdh_np_online_uninit(uint32_t dev_id, char *port_name, uint32_t queue_id);<br /> int zxdh_np_dtb_table_entry_write(uint32_t dev_id, uint32_t queue_id,<br />--  <br />2.27.0<br />