<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style>
</head>
<body dir="ltr">
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
Hi Stephen,</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
<br>
</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
Some time ago we received the change request about usage of threads inside of the ntnic PMD driver. I would like to discuss this request.</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
In our case, some threads are part of the design of the protocols between the driver and the FPGA, and are required for both functionality, robustness, and performance.</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
<br>
</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
We currently have 3 distinct threads: Monitoring thread, for health and statistics. Link manager thread, for automatic control of link of the physical ports. </div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
Flow thread, to service the flow related FIFOs of the FPGA.</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
The monitoring thread could be redesigned to API calls instead, for example rte_alarm, though the work will take some time. </div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
The link manager and flow thread can’t be redesigned without</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
1) significant changes to our FPGA or </div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
2) introduction of a kernel driver to handle the functionality. </div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
Due to this, we want to leave usage of threads as it is.</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
<br>
</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
We wonder if removing threads from the PMD driver is a strict requirement or a "nice to have feature?"</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
What are the technical concerns behind this request? What would the impact be if usage of threads remains the same(will the driver be excluded from the repo)?</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
Any thoughts about it are valuable; we will gladly discuss them.</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
<br>
</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
Thanks,</div>
<div class="elementToProof" style="font-family: Verdana, Geneva, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);">
Serhii</div>
<div id="appendonsend"></div>
<hr style="display: inline-block; width: 98%;">
<div dir="ltr" id="divRplyFwdMsg"><span style="font-family: Calibri, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);"><b>From:</b> Stephen Hemminger <stephen@networkplumber.org><br>
<b>Sent:</b> 22 February 2025 23:41<br>
<b>To:</b> Serhii Iliushyk <sil-plv@napatech.com><br>
<b>Cc:</b> dev@dpdk.org <dev@dpdk.org>; Mykola Kostenok <mko-plv@napatech.com>; Christian Koue Muf <ckm@napatech.com><br>
<b>Subject:</b> Re: [PATCH v1 00/32] add new adapter NT400D13</span>
<div> </div>
</div>
<div style="font-size: 11pt;">On Thu, 20 Feb 2025 23:03:24 +0100<br>
Serhii Iliushyk <sil-plv@napatech.com> wrote:<br>
<br>
> This patchset adds support for the new adapter NT400D13.<br>
><br>
> Danylo Vodopianov (23):<br>
> net/ntnic: add link agx 100g<br>
> net/ntnic: add link state machine<br>
> net/ntnic: add rpf and gfg init<br>
> net/ntnic: add agx setup for port<br>
> net/ntnic: add host loopback init<br>
> net/ntnic: add line loopback init<br>
> net/ntnic: add 100 gbps port init<br>
> net/ntnic: add port post init<br>
> net/ntnic: add nim low power API<br>
> net/ntnic: add link handling API<br>
> net/ntnic: add port init to the state machine<br>
> net/ntnic: add port disable API<br>
> net/ntnic: add nt400d13 pcm init<br>
> net/ntnic: add HIF clock test<br>
> net/ntnic: add nt400d13 PRM module init<br>
> net/ntnic: add nt400d13 PRM module reset<br>
> net/ntnic: add SPI v3 support for FPGA<br>
> net/ntnic: add i2cm init<br>
> net/ntnic: add pca init<br>
> net/ntnic: add pcal init<br>
> net/ntnic: add reset PHY init<br>
> net/ntnic: add igam module init<br>
> net/ntnic: init IGAM and config PLL for FPGA<br>
><br>
> Serhii Iliushyk (9):<br>
> net/ntnic: add minimal initialization new NIC NT400D13<br>
> net/ntnic: add minimal reset FPGA<br>
> net/ntnic: add FPGA modules and registers<br>
> net/ntnic: add setup for fpga reset<br>
> net/ntnic: add default reset setting for NT400D13<br>
> net/ntnic: add DDR calibration to reset stage<br>
> net/ntnic: add PHY ftile reset<br>
> net/ntnic: add clock init<br>
> net/ntnic: revert untrusted loop bound<br>
><br>
> doc/guides/nics/ntnic.rst | 7 +-<br>
> doc/guides/rel_notes/release_25_03.rst | 4 +<br>
> drivers/net/ntnic/adapter/nt4ga_adapter.c | 9 +<br>
> drivers/net/ntnic/include/nt4ga_link.h | 7 +<br>
> drivers/net/ntnic/include/nthw_gfg.h | 33 +<br>
> drivers/net/ntnic/include/ntnic_nim.h | 5 +<br>
> .../include/ntnic_nthw_fpga_rst_nt400dxx.h | 34 +<br>
> .../link_agx_100g/nt4ga_agx_link_100g.c | 1029 ++++++<br>
> drivers/net/ntnic/https://linkprotect.cudasvc.com/url?a=https%3a%2f%2fmeson.build&c=E,1,V2jW0UmjAZTalpELBq8Dn7dVNfOTq_s_dwmagWH1e90cq826b3Jzkh8fF9_OEiNqN1Y6yB9ByFEKV0xnAbe5QV4HLrYCdQV_kB9SynmAtvcFYup0pmk,&typo=1 | 16 +<br>
> drivers/net/ntnic/nim/i2c_nim.c | 158 +-<br>
> drivers/net/ntnic/nim/i2c_nim.h | 6 +<br>
> ...00D13_U62_Si5332-GM2-RevD-1_V5-Registers.h | 425 +++<br>
> .../net/ntnic/nthw/core/include/nthw_fpga.h | 10 +<br>
> .../net/ntnic/nthw/core/include/nthw_gmf.h | 2 +<br>
> .../net/ntnic/nthw/core/include/nthw_hif.h | 4 +<br>
> .../net/ntnic/nthw/core/include/nthw_i2cm.h | 3 +<br>
> .../net/ntnic/nthw/core/include/nthw_igam.h | 40 +<br>
> .../ntnic/nthw/core/include/nthw_pca9532.h | 25 +<br>
> .../ntnic/nthw/core/include/nthw_pcal6416a.h | 33 +<br>
> .../nthw/core/include/nthw_pcm_nt400dxx.h | 40 +<br>
> .../ntnic/nthw/core/include/nthw_phy_tile.h | 156 +<br>
> .../nthw/core/include/nthw_prm_nt400dxx.h | 32 +<br>
> .../nthw/core/include/nthw_si5332_si5156.h | 63 +<br>
> .../net/ntnic/nthw/core/include/nthw_spi_v3.h | 107 +<br>
> .../net/ntnic/nthw/core/include/nthw_spim.h | 58 +<br>
> .../net/ntnic/nthw/core/include/nthw_spis.h | 63 +<br>
> .../nthw/core/nt400dxx/nthw_fpga_nt400dxx.c | 220 ++<br>
> .../core/nt400dxx/reset/nthw_fpga_rst9574.c | 377 ++<br>
> .../nt400dxx/reset/nthw_fpga_rst_nt400dxx.c | 427 +++<br>
> drivers/net/ntnic/nthw/core/nthw_fpga.c | 464 +++<br>
> drivers/net/ntnic/nthw/core/nthw_gfg.c | 340 ++<br>
> drivers/net/ntnic/nthw/core/nthw_gmf.c | 41 +<br>
> drivers/net/ntnic/nthw/core/nthw_hif.c | 92 +<br>
> drivers/net/ntnic/nthw/core/nthw_i2cm.c | 139 +<br>
> drivers/net/ntnic/nthw/core/nthw_igam.c | 93 +<br>
> drivers/net/ntnic/nthw/core/nthw_pca9532.c | 60 +<br>
> drivers/net/ntnic/nthw/core/nthw_pcal6416a.c | 103 +<br>
> .../net/ntnic/nthw/core/nthw_pcm_nt400dxx.c | 80 +<br>
> drivers/net/ntnic/nthw/core/nthw_phy_tile.c | 1242 +++++++<br>
> .../net/ntnic/nthw/core/nthw_prm_nt400dxx.c | 55 +<br>
> .../net/ntnic/nthw/core/nthw_si5332_si5156.c | 142 +<br>
> drivers/net/ntnic/nthw/core/nthw_spi_v3.c | 358 ++<br>
> drivers/net/ntnic/nthw/core/nthw_spim.c | 113 +<br>
> drivers/net/ntnic/nthw/core/nthw_spis.c | 121 +<br>
> drivers/net/ntnic/nthw/nthw_drv.h | 31 +<br>
> drivers/net/ntnic/nthw/nthw_platform.c | 3 +<br>
> drivers/net/ntnic/nthw/nthw_platform_drv.h | 2 +<br>
> .../supported/nthw_fpga_9574_055_049_0000.c | 3124 +++++++++++++++++<br>
> .../nthw/supported/nthw_fpga_instances.c | 5 +-<br>
> .../nthw/supported/nthw_fpga_instances.h | 1 +<br>
> .../ntnic/nthw/supported/nthw_fpga_mod_defs.h | 11 +<br>
> .../nthw/supported/nthw_fpga_mod_str_map.c | 11 +<br>
> .../ntnic/nthw/supported/nthw_fpga_reg_defs.h | 11 +<br>
> .../nthw/supported/nthw_fpga_reg_defs_igam.h | 32 +<br>
> .../supported/nthw_fpga_reg_defs_pci_ta.h | 33 +<br>
> .../nthw_fpga_reg_defs_pcm_nt400dxx.h | 29 +<br>
> .../nthw/supported/nthw_fpga_reg_defs_pdi.h | 49 +<br>
> .../supported/nthw_fpga_reg_defs_phy_tile.h | 213 ++<br>
> .../nthw_fpga_reg_defs_prm_nt400dxx.h | 26 +<br>
> .../nthw/supported/nthw_fpga_reg_defs_rfd.h | 38 +<br>
> .../supported/nthw_fpga_reg_defs_rst9574.h | 35 +<br>
> .../nthw/supported/nthw_fpga_reg_defs_spim.h | 76 +<br>
> .../nthw/supported/nthw_fpga_reg_defs_spis.h | 51 +<br>
> .../nthw/supported/nthw_fpga_reg_defs_tint.h | 28 +<br>
> drivers/net/ntnic/ntnic_ethdev.c | 1 +<br>
> drivers/net/ntnic/ntnic_filter/ntnic_filter.c | 2 +-<br>
> drivers/net/ntnic/ntnic_mod_reg.c | 47 +<br>
> drivers/net/ntnic/ntnic_mod_reg.h | 25 +<br>
> 68 files changed, 10709 insertions(+), 11 deletions(-)<br>
> create mode 100644 drivers/net/ntnic/include/nthw_gfg.h<br>
> create mode 100644 drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt400dxx.h<br>
> create mode 100644 drivers/net/ntnic/link_mgmt/link_agx_100g/nt4ga_agx_link_100g.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/NT400D13_U62_Si5332-GM2-RevD-1_V5-Registers.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_igam.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_pca9532.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_pcal6416a.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_pcm_nt400dxx.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_phy_tile.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_prm_nt400dxx.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_si5332_si5156.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_spi_v3.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_spim.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_spis.h<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nt400dxx/nthw_fpga_nt400dxx.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9574.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_gfg.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_igam.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_pca9532.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_pcal6416a.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_pcm_nt400dxx.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_phy_tile.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_prm_nt400dxx.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_si5332_si5156.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_spi_v3.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_spim.c<br>
> create mode 100644 drivers/net/ntnic/nthw/core/nthw_spis.c<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_9574_055_049_0000.c<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_igam.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_pci_ta.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_pcm_nt400dxx.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_pdi.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_phy_tile.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_prm_nt400dxx.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rfd.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rst9574.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_spim.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_spis.h<br>
> create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_tint.h<br>
><br>
<br>
I will merge this for next-net BUT<br>
The driver is better after this patch series, but still low quality.<br>
<br>
Several pre-existing issues in this driver; looks like it did not get enough<br>
review during 24.11 release when it was merged.<br>
<br>
✔ passed<br>
✘ Failed<br>
<br>
Basic hygiene<br>
✔ Look at CI results in patchwork<br>
✔ Merge cleanly with git am<br>
✔ Run checkpatches<br>
✔ Run check-git-log<br>
✔ Run <a href="https://linkprotect.cudasvc.com/url?a=https%3a%2f%2fcheck-symbol-maps.sh&c=E,1,_xJVo6bETFeApP-wtnvbWAvxaCa7qbnLMt7zRlpiRqjS0m95ct6mvHNzJet-519faqsNDIQ1syIb2Zy2Ofg6Ow0SCxip8zUntKKIuMak&typo=1" id="OWA006b391d-bdbe-f273-d042-d3b599efef03" class="OWAAutoLink" data-auth="NotApplicable">
https://linkprotect.cudasvc.com/url?a=https%3a%2f%2fcheck-symbol-maps.sh&c=E,1,_xJVo6bETFeApP-wtnvbWAvxaCa7qbnLMt7zRlpiRqjS0m95ct6mvHNzJet-519faqsNDIQ1syIb2Zy2Ofg6Ow0SCxip8zUntKKIuMak&typo=1</a><br>
✔ Run check-doc-vs-code<br>
✔ Run check-spdk-tag<br>
<br>
Builds<br>
✔ Normal Gcc build; make sure driver is built!<br>
✔ Use latest experimental Gcc 15<br>
✔ Clang build using current version (clang-19)<br>
✔ Doc build<br>
o Build for 32 bit x86<br>
o Cross build for Windows (if applicable)<br>
✔ Debug build<br>
✔ Enable asserts<br>
✔ Test meson builds<br>
<br>
Experimental builds:<br>
✔ Enable address sanitizer<br>
<br>
✘ Enable extra warnings (edit <a href="https://linkprotect.cudasvc.com/url?a=https%3a%2f%2fmeson.build&c=E,1,mL1G4BVjr4bxM-sD_s9RIW1LCs5wCyCL61shJTZo3iTRNFbe50BYXiKNbPD6OaCA84bSRTFNPk1K6QYBvlf7Q3XzyW8lLPKkgH9tUdywAJZkhd-X5iW-f4bjPA,,&typo=1)" id="OWA2e7c51ec-f612-c04d-b12f-2b02d0d1d22d" class="OWAAutoLink" data-auth="NotApplicable">
https://linkprotect.cudasvc.com/url?a=https%3a%2f%2fmeson.build&c=E,1,mL1G4BVjr4bxM-sD_s9RIW1LCs5wCyCL61shJTZo3iTRNFbe50BYXiKNbPD6OaCA84bSRTFNPk1K6QYBvlf7Q3XzyW8lLPKkgH9tUdywAJZkhd-X5iW-f4bjPA,,&typo=1)</a> for<br>
-Wvla, -Wformat-truncation, -Waddress-of-packed-member<br>
<br>
Let's not add more VLA's, these could be arrays with a fixed size.<br>
<br>
[1470/3259] Compiling C object drivers...ofile_inline_flow_api_hw_db_inline.c.o<br>
../drivers/net/ntnic/nthw/flow_api/profile_inline/flow_api_hw_db_inline.c: In function ‘hw_db_inline_alloc_prioritized_cfn’:<br>
../drivers/net/ntnic/nthw/flow_api/profile_inline/flow_api_hw_db_inline.c:1346:9: warning: ISO C90 forbids variable length array ‘sorted_priority’ [-Wvla]<br>
1346 | } sorted_priority[db->nb_cat];<br>
| ^<br>
<br>
[1479/3259] Compiling C object drivers...ile_inline_flow_api_profile_inline.c.o<br>
../drivers/net/ntnic/nthw/flow_api/profile_inline/flow_api_profile_inline.c: In function ‘setup_db_qsl_data’:<br>
../drivers/net/ntnic/nthw/flow_api/profile_inline/flow_api_profile_inline.c:3193:17: warning: ISO C90 forbids variable length array ‘ports’ [-Wvla]<br>
3193 | uint32_t ports[fd->dst_num_avail];<br>
| ^~~~~~~~<br>
../drivers/net/ntnic/nthw/flow_api/profile_inline/flow_api_profile_inline.c:3194:17: warning: ISO C90 forbids variable length array ‘queues’ [-Wvla]<br>
3194 | uint32_t queues[fd->dst_num_avail];<br>
| ^~~~~~~~<br>
<br>
This is not doing what you expect, ports is uint32_t array<br>
<br>
uint32_t ports[fd->dst_num_avail];<br>
uint32_t queues[fd->dst_num_avail];<br>
<br>
memset(ports, 0, fd->dst_num_avail);<br>
memset(queues, 0, fd->dst_num_avail);<br>
<br>
Instead use HW_DB_INLINE_MAX_QST_PER_QSL<br>
<br>
<br>
Look for anti-patterns:<br>
✘ Driver must not disable warnings with compiler flags or pragma's<br>
Using pragma pack()<br>
<br>
✘ Driver must not use thread and signal<br>
Using thread to monitor, should not be done by PMD specific thread.<br>
<br>
✘ Driver should not call abort() or assert() directly<br>
Is using assert() when should be using RTE_ASSERT()<br>
<br>
✘ Review exposed symbol names<br>
The driver exposes lots of global symbols (when statically linked)<br>
that do not have a consistent prefix of nthw_...<br>
Examples: get_rx_idle(), set_rx_idle(), dev_flow_init()<br>
<br>
<br>
✔ Apply coccinelle scripts<br>
<br>
✘ Review use of malloc<br>
Several places call malloc but do not check return value<br>
<br>
✘ Review use of memset<br>
<br>
The code related to stats has several issues:<br>
- function returns -1 but never checked by callers<br>
- stats structure is already zero'd by ethdev<br>
- if queue is greater than RTE_ETHDEV_QUEUE_STAT_CNTRS the statistics should<br>
still be counted for that queue, just no per-queue stats<br>
- the use of term if_index is potentially confusing; normally if_index refers to the interface<br>
index assigned by the OS used for ioctl's etc. In this driver it appears to be the index<br>
of the phy.<br>
<br>
static int dpdk_stats_collect(struct pmd_internals *internals, struct rte_eth_stats *stats)<br>
{<br>
const struct ntnic_filter_ops *ntnic_filter_ops = get_ntnic_filter_ops();<br>
<br>
if (ntnic_filter_ops == NULL) {<br>
NT_LOG_DBGX(ERR, NTNIC, "ntnic_filter_ops uninitialized");<br>
return -1;<br>
}<br>
...<br>
ntnic_filter_ops->poll_statistics(internals);<br>
memset(stats, 0, sizeof(*stats));<br>
<br>
for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS && i < internals->nb_rx_queues; i++) {<br>
stats->q_ipackets[i] = internals->rxq_scg[i].rx_pkts;<br>
stats->q_ibytes[i] = internals->rxq_scg[i].rx_bytes;<br>
rx_total += stats->q_ipackets[i];<br>
rx_total_b += stats->q_ibytes[i];<br>
}<br>
<br>
for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS && i < internals->nb_tx_queues; i++) {<br>
stats->q_opackets[i] = internals->txq_scg[i].tx_pkts;<br>
stats->q_obytes[i] = internals->txq_scg[i].tx_bytes;<br>
stats->q_errors[i] = internals->txq_scg[i].err_pkts;<br>
tx_total += stats->q_opackets[i];<br>
tx_total_b += stats->q_obytes[i];<br>
tx_err_total += stats->q_errors[i];<br>
}<br>
<br>
Other:<br>
The handling of queue start/stop in this device is odd.<br>
Doesn't do deferred start.<br>
When Rx is stopped most drivers do some action to stop the hardware.<br>
<br>
Given the use of thread, driver should *not* have been merged in 24.11.<br>
The DPDK has a set of assumptions about thread and process model, and<br>
drivers making their own threads can cause problems in applications.<br>
(Other drivers use alarm for this type of port monitor function).</div>
</body>
</html>