<!DOCTYPE html><html><head> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> </head> <body> Hi Sunyuechi, <div class="moz-cite-prefix">On 28/05/2025 18:00, <a class="moz-txt-link-abbreviated" href="mailto:uk7b@foxmail.com">uk7b@foxmail.com</a> wrote: </div> <blockquote type="cite" cite="mid:tencent_A2BD85C9F3B0AA4658640DA91443CDF5630A@qq.com"> <pre wrap="" class="moz-quote-pre">From: sunyuechi <a class="moz-txt-link-rfc2396E" href="mailto:sunyuechi@iscas.ac.cn"><sunyuechi@iscas.ac.cn></a> bpi-f3: scalar: 5.7 cycles rvv: 2.4 cycles Maybe runtime detection in LPM should be added for all architectures, but this commit is only about the RVV part. </pre> </blockquote> I would advise you to look into the FIB library, it has exactly what you are looking for. Also, please consider writing a slightly more informative and explanatory commit message. <blockquote type="cite" cite="mid:tencent_A2BD85C9F3B0AA4658640DA91443CDF5630A@qq.com"> <pre wrap="" class="moz-quote-pre"> Signed-off-by: sunyuechi <a class="moz-txt-link-rfc2396E" href="mailto:sunyuechi@iscas.ac.cn"><sunyuechi@iscas.ac.cn></a> --- MAINTAINERS | 2 + lib/lpm/meson.build | 1 + lib/lpm/rte_lpm.h | 2 + lib/lpm/rte_lpm_rvv.h | 91 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 96 insertions(+) create mode 100644 lib/lpm/rte_lpm_rvv.h </pre> </blockquote> <snip> <blockquote type="cite" cite="mid:tencent_A2BD85C9F3B0AA4658640DA91443CDF5630A@qq.com"> <pre wrap="" class="moz-quote-pre"> +static inline void rte_lpm_lookupx4_rvv( + const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4], uint32_t defv) +{ + size_t vl = 4; + + const uint32_t *tbl24_p = (const uint32_t *)lpm->tbl24; + uint32_t tbl_entries[4] = { + tbl24_p[((uint32_t)ip[0]) >> 8], + tbl24_p[((uint32_t)ip[1]) >> 8], + tbl24_p[((uint32_t)ip[2]) >> 8], + tbl24_p[((uint32_t)ip[3]) >> 8], + };</pre> </blockquote> I'm not an expert in RISC-V, but why is it done in a scalar way instead of using __riscv_vsrl_vx_u32m1()? I assume you're relying on the compiler here? Also, have you redefined the xmm_t type for proper index addressing? <blockquote type="cite" cite="mid:tencent_A2BD85C9F3B0AA4658640DA91443CDF5630A@qq.com"> <pre wrap="" class="moz-quote-pre"> + vuint32m1_t vtbl_entry = __riscv_vle32_v_u32m1(tbl_entries, vl); + + vbool32_t mask = __riscv_vmseq_vx_u32m1_b32( + __riscv_vand_vx_u32m1(vtbl_entry, RTE_LPM_VALID_EXT_ENTRY_BITMASK, vl), + RTE_LPM_VALID_EXT_ENTRY_BITMASK, vl); </pre> </blockquote> <snip> <blockquote type="cite" cite="mid:tencent_A2BD85C9F3B0AA4658640DA91443CDF5630A@qq.com"> <pre wrap="" class="moz-quote-pre"> + +static inline void rte_lpm_lookupx4( + const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4], uint32_t defv) +{ + lpm_lookupx4_impl(lpm, ip, hop, defv); +} + +RTE_INIT(rte_lpm_init_alg) +{ + lpm_lookupx4_impl = rte_cpu_get_flag_enabled(RTE_CPUFLAG_RISCV_ISA_V) + ? rte_lpm_lookupx4_rvv + : rte_lpm_lookupx4_scalar; +}</pre> </blockquote> As I mentioned earlier, I'd recommend that you use FIB to select an implementation at runtime. All the rest LPM vector x4 implementations are done this way, and their code is inlined. <blockquote type="cite" cite="mid:tencent_A2BD85C9F3B0AA4658640DA91443CDF5630A@qq.com"> <pre wrap="" class="moz-quote-pre"> + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_LPM_RVV_H_ */ </pre> </blockquote> <pre class="moz-signature" cols="72">-- Regards, Vladimir</pre> </body> </html>