Hi, Just checking if this patch might be merged soon, since there haven’t been any change requests for a while. <blockquote name="replyContent" class="ReferenceQuote" style="padding-left:5px;margin-left:5px;border-left:#b6b6b6 2px solid;margin-right:0;"> -----原始邮件----- 发件人:"Stanisław Kardach" <stanislaw.kardach@gmail.com> 发送时间:2025-08-12 17:21:53 (星期二) 收件人: uk7b@foxmail.com 抄送: dev@dpdk.org, "Sun Yuechi" <sunyuechi@iscas.ac.cn>, "Thomas Monjalon" <thomas@monjalon.net>, "Bruce Richardson" <bruce.richardson@intel.com> 主题: Re: [PATCH v2 1/5] config/riscv: detect V extension <div dir="auto"> <div> <div class="gmail_quote gmail_quote_container"> <div dir="ltr" class="gmail_attr"> On Tue, 1 Jul 2025, 20:21 , <<a href="mailto:uk7b@foxmail.com">uk7b@foxmail.com</a>> wrote: </div> <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid #CCCCCC;padding-left:1ex;"> From: Sun Yuechi <<a href="mailto:sunyuechi@iscas.ac.cn" target="_blank" rel="noreferrer">sunyuechi@iscas.ac.cn</a>> This patch is derived from "config/riscv: detect presence of Zbc extension with modifications". The RISC-V C api defines architecture extension test macros These let us detect whether the V extension is supported on the compiler and -march we're building with. The C api also defines V intrinsics we can use rather than inline assembly on newer versions of GCC (14.1.0+) and Clang (18.1.0+). If the V extension and intrinsics are both present and we can detect the V extension at runtime, we define a flag, RTE_RISCV_FEATURE_V. Signed-off-by: Sun Yuechi <<a href="mailto:sunyuechi@iscas.ac.cn" target="_blank" rel="noreferrer">sunyuechi@iscas.ac.cn</a>> </blockquote> </div> </div> <div dir="auto"> Reviewed-by: Stanisław Kardach <<a href="mailto:stanislaw.kardach@gmail.com">stanislaw.kardach@gmail.com</a>> </div> <div dir="auto"> <div class="gmail_quote gmail_quote_container"> <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid #CCCCCC;padding-left:1ex;"> --- .mailmap | 1 + config/riscv/meson.build | 25 +++++++++++++++++++++++++ lib/eal/riscv/include/rte_vect.h | 4 ++++ 3 files changed, 30 insertions(+) diff --git a/.mailmap b/.mailmap index 8483d96ec5..21f5d7fb5e 100644 --- a/.mailmap +++ b/.mailmap @@ -1513,6 +1513,7 @@ Sunil Kumar Kori <<a href="mailto:skori@marvell.com" target="_blank" rel="noreferrer">skori@marvell.com</a>> <<a href="mailto:skori@mavell.com" target="_blank" rel="noreferrer">skori@mavell.com</a>> <<a href="mailto:sunil.kori@nxp.com" target="_blank" rel="noreferrer">sunil.kori@nxp.com</a>> Sunil Pai G <<a href="mailto:sunil.pai.g@intel.com" target="_blank" rel="noreferrer">sunil.pai.g@intel.com</a>> Sunil Uttarwar <<a href="mailto:sunilprakashrao.uttarwar@amd.com" target="_blank" rel="noreferrer">sunilprakashrao.uttarwar@amd.com</a>> Sun Jiajia <<a href="mailto:sunx.jiajia@intel.com" target="_blank" rel="noreferrer">sunx.jiajia@intel.com</a>> +Sun Yuechi <<a href="mailto:sunyuechi@iscas.ac.cn" target="_blank" rel="noreferrer">sunyuechi@iscas.ac.cn</a>> <<a href="mailto:uk7b@foxmail.com" target="_blank" rel="noreferrer">uk7b@foxmail.com</a>> Sunyang Wu <<a href="mailto:sunyang.wu@jaguarmicro.com" target="_blank" rel="noreferrer">sunyang.wu@jaguarmicro.com</a>> Surabhi Boob <<a href="mailto:surabhi.boob@intel.com" target="_blank" rel="noreferrer">surabhi.boob@intel.com</a>> Suyang Ju <<a href="mailto:sju@paloaltonetworks.com" target="_blank" rel="noreferrer">sju@paloaltonetworks.com</a>> diff --git a/config/riscv/meson.build b/config/riscv/meson.build index 7562c6cb99..e3694cf2e6 100644 --- a/config/riscv/meson.build +++ b/config/riscv/meson.build @@ -119,6 +119,31 @@ foreach flag: arch_config['machine_args'] endif endforeach +# check if we can do buildtime detection of extensions supported by the target +riscv_extension_macros = false +if (cc.get_define('__riscv_arch_test', args: machine_args) == '1') + message('Detected architecture extension test macros') + riscv_extension_macros = true +else + warning('RISC-V architecture extension test macros not available. Build-time detection of extensions not possible') +endif + +# detect extensions +# Requires intrinsics available in GCC 14.1.0+ and Clang 18.1.0+ +if (riscv_extension_macros and + (cc.get_define('__riscv_vector', args: machine_args) != '')) + if ((cc.get_id() == 'gcc' and cc.version().version_compare('>=14.1.0')) + or (cc.get_id() == 'clang' and cc.version().version_compare('>=18.1.0'))) + if (cc.compiles('''#include <riscv_vector.h> + int main(void) { size_t vl = __riscv_vsetvl_e32m1(1); }''', args: machine_args)) + message('Compiling with the V extension') + machine_args += ['-DRTE_RISCV_FEATURE_V'] + endif + else + warning('Detected V extension but cannot use because intrinsics are not available (present in GCC 14.1.0+ and Clang 18.1.0+)') + endif +endif + # apply flags foreach flag: dpdk_flags if flag.length() > 0 diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h index 6df10fa8ee..a4357e266a 100644 --- a/lib/eal/riscv/include/rte_vect.h +++ b/lib/eal/riscv/include/rte_vect.h @@ -11,6 +11,10 @@ #include "generic/rte_vect.h" #include "rte_common.h" +#ifdef RTE_RISCV_FEATURE_V +#include <riscv_vector.h> +#endif + #ifdef __cplusplus extern "C" { #endif -- 2.50.0 </blockquote> </div> </div> </div> </blockquote>