add support for modifying queue depth, min depth is 512,<br />and max depth is 32768<br /> <br />Signed-off-by: Junlong Wang <wang.junlong1@zte.com.cn> <br />---<br /> drivers/net/zxdh/zxdh_ethdev.c | 161 +++++++++++++++++++++------------<br /> drivers/net/zxdh/zxdh_ethdev.h |  15 +++<br /> drivers/net/zxdh/zxdh_queue.c  | 137 +++++++++++++++++++++++-----<br /> drivers/net/zxdh/zxdh_queue.h  |  11 ++-<br /> 4 files changed, 240 insertions(+), 84 deletions(-)<br /> <br />diff --git a/drivers/net/zxdh/zxdh_ethdev.c b/drivers/net/zxdh/zxdh_ethdev.c<br />index bc929bacc5..80b992d4ad 100644<br />--- a/drivers/net/zxdh/zxdh_ethdev.c<br />+++ b/drivers/net/zxdh/zxdh_ethdev.c<br />@@ -641,7 +641,8 @@ zxdh_init_queue(struct rte_eth_dev *dev, uint16_t vtpci_logic_qidx)<br />     uint32_t vq_size = 0;<br />     int32_t ret = 0;<br />  <br />-    if (hw->channel_context[vtpci_logic_qidx].valid == 0) {<br />+    if (vtpci_logic_qidx >= ZXDH_QUEUES_NUM_MAX ||<br />+        hw->channel_context[vtpci_logic_qidx].valid == 0) {<br />         PMD_DRV_LOG(ERR, "lch %d is invalid", vtpci_logic_qidx);<br />         return -EINVAL;<br />     }<br />@@ -650,7 +651,10 @@ zxdh_init_queue(struct rte_eth_dev *dev, uint16_t vtpci_logic_qidx)<br />     PMD_DRV_LOG(DEBUG, "vtpci_logic_qidx :%d setting up physical queue: %u on NUMA node %d",<br />             vtpci_logic_qidx, vtpci_phy_qidx, numa_node);<br />  <br />-    vq_size = ZXDH_QUEUE_DEPTH;<br />+    if (queue_type == ZXDH_VTNET_RQ)<br />+        vq_size = hw->queue_conf->conf[vtpci_logic_qidx >> 1].rx_nb_desc;<br />+    else<br />+        vq_size = hw->queue_conf->conf[vtpci_logic_qidx >> 1].tx_nb_desc;<br />  <br />     if (ZXDH_VTPCI_OPS(hw)->set_queue_num != NULL)<br />         ZXDH_VTPCI_OPS(hw)->set_queue_num(hw, vtpci_phy_qidx, vq_size);<br />@@ -980,12 +984,6 @@ zxdh_dev_conf_offload(struct rte_eth_dev *dev)<br />         return ret;<br />     }<br />  <br />-    ret = zxdh_rss_configure(dev);<br />-    if (ret) {<br />-        PMD_DRV_LOG(ERR, "rss configure failed");<br />-        return ret;<br />-    }<br />-<br />     ret = zxdh_rx_csum_lro_offload_configure(dev);<br />     if (ret) {<br />         PMD_DRV_LOG(ERR, "rx csum lro configure failed");<br />@@ -1081,52 +1079,6 @@ zxdh_dev_configure(struct rte_eth_dev *dev)<br />     hw->has_tx_offload = zxdh_tx_offload_enabled(hw);<br />     hw->has_rx_offload = zxdh_rx_offload_enabled(hw);<br />  <br />-    if (dev->data->nb_rx_queues == hw->rx_qnum && <br />-            dev->data->nb_tx_queues == hw->tx_qnum) {<br />-        PMD_DRV_LOG(DEBUG, "The queue not need to change. queue_rx %d queue_tx %d",<br />-                hw->rx_qnum, hw->tx_qnum);<br />-        /*no queue changed */<br />-        goto end;<br />-    }<br />-<br />-    PMD_DRV_LOG(DEBUG, "queue changed need reset");<br />-    /* Reset the device although not necessary at startup */<br />-    zxdh_pci_reset(hw);<br />-<br />-    /* Tell the host we've noticed this device. */<br />-    zxdh_pci_set_status(hw, ZXDH_CONFIG_STATUS_ACK);<br />-<br />-    /* Tell the host we've known how to drive the device. */<br />-    zxdh_pci_set_status(hw, ZXDH_CONFIG_STATUS_DRIVER);<br />-    /* The queue needs to be released when reconfiguring*/<br />-    if (hw->vqs != NULL) {<br />-        zxdh_dev_free_mbufs(dev);<br />-        zxdh_free_queues(dev);<br />-    }<br />-<br />-    hw->rx_qnum = dev->data->nb_rx_queues;<br />-    hw->tx_qnum = dev->data->nb_tx_queues;<br />-    ret = zxdh_alloc_queues(dev);<br />-    if (ret < 0)<br />-        return ret;<br />-<br />-    zxdh_datach_set(dev);<br />-<br />-    if (zxdh_configure_intr(dev) < 0) {<br />-        PMD_DRV_LOG(ERR, "Failed to configure interrupt");<br />-        zxdh_free_queues(dev);<br />-        return -1;<br />-    }<br />-<br />-    ret = zxdh_rss_qid_config(dev);<br />-    if (ret) {<br />-        PMD_DRV_LOG(ERR, "Failed to configure base qid!");<br />-        return -1;<br />-    }<br />-<br />-    zxdh_pci_reinit_complete(hw);<br />-<br />-end:<br />     zxdh_dev_conf_offload(dev);<br />     zxdh_update_net_hdr_dl(hw);<br />     return ret;<br />@@ -1264,6 +1216,9 @@ zxdh_priv_res_free(struct zxdh_hw *priv)<br />  <br />     rte_free(priv->channel_context);<br />     priv->channel_context = NULL;<br />+<br />+    rte_free(priv->queue_conf);<br />+    priv->queue_conf = NULL;<br /> }<br />  <br /> static int<br />@@ -1354,6 +1309,88 @@ zxdh_mac_config(struct rte_eth_dev *eth_dev)<br />     return ret;<br /> }<br />  <br />+static int32_t zxdh_reconfig_queues(struct rte_eth_dev *dev)<br />+{<br />+    int32_t ret;<br />+    struct zxdh_hw *hw = dev->data->dev_private;<br />+<br />+    zxdh_pci_reset(hw);<br />+<br />+    /* Tell the host we've noticed this device. */<br />+    zxdh_pci_set_status(hw, ZXDH_CONFIG_STATUS_ACK);<br />+<br />+    /* Tell the host we've known how to drive the device. */<br />+    zxdh_pci_set_status(hw, ZXDH_CONFIG_STATUS_DRIVER);<br />+    /* The queue needs to be released when reconfiguring */<br />+    if (hw->vqs != NULL) {<br />+        zxdh_dev_free_mbufs(dev);<br />+        zxdh_free_queues(dev);<br />+    }<br />+<br />+    hw->rx_qnum = dev->data->nb_rx_queues;<br />+    hw->tx_qnum = dev->data->nb_tx_queues;<br />+    ret = zxdh_alloc_queues(dev);<br />+    if (ret < 0)<br />+        return ret;<br />+<br />+    zxdh_datach_set(dev);<br />+<br />+    if (zxdh_configure_intr(dev) < 0) {<br />+        PMD_DRV_LOG(ERR, "Failed to configure interrupt");<br />+        zxdh_free_queues(dev);<br />+        return -1;<br />+    }<br />+<br />+    zxdh_pci_reinit_complete(hw);<br />+    return 0;<br />+}<br />+<br />+static int32_t zxdh_config_queue(struct rte_eth_dev *dev)<br />+{<br />+    struct zxdh_hw *hw = dev->data->dev_private;<br />+    int32_t ret = 0, i = 0;<br />+<br />+    if (hw->queue_conf->queue_changed) {<br />+        ret = zxdh_reconfig_queues(dev);<br />+        if (ret)<br />+            return ret;<br />+<br />+        ret = zxdh_rss_qid_config(dev);<br />+        if (ret) {<br />+            PMD_DRV_LOG(ERR, "Failed to configure base qid!");<br />+            return -1;<br />+        }<br />+<br />+        ret = zxdh_rss_configure(dev);<br />+        if (ret) {<br />+            PMD_DRV_LOG(ERR, "Failed to config rss");<br />+            return -1;<br />+        }<br />+        hw->queue_conf->queue_changed = 0;<br />+    }<br />+<br />+    for (i = 0; i < dev->data->nb_tx_queues; i++) {<br />+        ret = zxdh_tx_queue_config(dev, i);<br />+        if (ret) {<br />+            PMD_DRV_LOG(ERR, "Failed to config tx queue");<br />+            return ret;<br />+        }<br />+    }<br />+<br />+    for (i = 0; i < dev->data->nb_rx_queues; i++) {<br />+        ret = zxdh_rx_queue_config(dev, i);<br />+        if (ret) {<br />+            PMD_DRV_LOG(ERR, "Failed to config rx queue");<br />+            return ret;<br />+        }<br />+        ret = zxdh_dev_rx_queue_setup_finish(dev, i);<br />+        if (ret < 0)<br />+            return ret;<br />+    }<br />+<br />+    return 0;<br />+}<br />+<br /> static int<br /> zxdh_dev_start(struct rte_eth_dev *dev)<br /> {<br />@@ -1363,12 +1400,9 @@ zxdh_dev_start(struct rte_eth_dev *dev)<br />     uint16_t logic_qidx;<br />     uint16_t i;<br />  <br />-    for (i = 0; i < dev->data->nb_rx_queues; i++) {<br />-        logic_qidx = 2 * i + ZXDH_RQ_QUEUE_IDX;<br />-        ret = zxdh_dev_rx_queue_setup_finish(dev, logic_qidx);<br />-        if (ret < 0)<br />-            return ret;<br />-    }<br />+    ret = zxdh_config_queue(dev);<br />+    if (ret)<br />+        return ret;<br />  <br />     zxdh_set_rxtx_funcs(dev);<br />     ret = zxdh_intr_enable(dev);<br />@@ -2081,6 +2115,13 @@ zxdh_priv_res_init(struct zxdh_hw *hw)<br />         PMD_DRV_LOG(ERR, "Failed to allocate channel_context");<br />         return -ENOMEM;<br />     }<br />+<br />+    hw->queue_conf = rte_zmalloc("zxdh_queue_conf", sizeof(struct zxdh_queue_conf), 0);<br />+    if (hw->queue_conf == NULL) {<br />+        PMD_DRV_LOG(ERR, "Failed to allocate queue conf");<br />+        return -ENOMEM;<br />+    }<br />+<br />     return 0;<br /> }<br />  <br />diff --git a/drivers/net/zxdh/zxdh_ethdev.h b/drivers/net/zxdh/zxdh_ethdev.h<br />index a269199540..411d287f32 100644<br />--- a/drivers/net/zxdh/zxdh_ethdev.h<br />+++ b/drivers/net/zxdh/zxdh_ethdev.h<br />@@ -94,6 +94,20 @@ struct vfinfo {<br />     struct rte_ether_addr vf_mac[ZXDH_MAX_MAC_ADDRS];<br /> };<br />  <br />+struct queue_conf {<br />+    struct rte_mempool *queue_mp;<br />+    struct rte_eth_rxconf zxdh_rx_conf;<br />+    struct rte_eth_txconf zxdh_tx_conf;<br />+    uint16_t rx_nb_desc;<br />+    uint16_t tx_nb_desc;<br />+};<br />+<br />+struct zxdh_queue_conf {<br />+    struct queue_conf conf[ZXDH_QUEUES_NUM_MAX / 2];<br />+    uint16_t queue_changed;<br />+    uint16_t rsv;<br />+};<br />+<br /> struct zxdh_hw {<br />     struct rte_eth_dev *eth_dev;<br />     struct zxdh_pci_common_cfg *common_cfg;<br />@@ -105,6 +119,7 @@ struct zxdh_hw {<br />     struct zxdh_dev_shared_data *dev_sd;<br />     struct zxdh_dev_nic_shared_data *dev_nic_sd;<br />     struct vfinfo *vfinfo;<br />+    struct zxdh_queue_conf *queue_conf;<br />  <br />     uint64_t bar_addr[ZXDH_NUM_BARS];<br />     uint64_t host_features;<br />diff --git a/drivers/net/zxdh/zxdh_queue.c b/drivers/net/zxdh/zxdh_queue.c<br />index 9266756d79..4eb8ef782c 100644<br />--- a/drivers/net/zxdh/zxdh_queue.c<br />+++ b/drivers/net/zxdh/zxdh_queue.c<br />@@ -184,6 +184,45 @@ zxdh_check_mempool(struct rte_mempool *mp, uint16_t offset, uint16_t min_length)<br />     return 0;<br /> }<br />  <br />+static unsigned int<br />+log2above(unsigned int v)<br />+{<br />+    unsigned int l;<br />+    unsigned int r;<br />+<br />+    for (l = 0, r = 0; (v >> 1); ++l, v >>= 1)<br />+        r |= (v & 1);<br />+    return l + r;<br />+}<br />+<br />+static uint16_t zxdh_queue_desc_pre_setup(uint16_t desc)<br />+{<br />+    uint32_t nb_desc = desc;<br />+<br />+    if (desc < ZXDH_MIN_QUEUE_DEPTH) {<br />+        PMD_DRV_LOG(WARNING, "nb_desc(%u) < min queue depth (%u), turn to min queue depth",<br />+                desc, ZXDH_MIN_QUEUE_DEPTH);<br />+        return ZXDH_MIN_QUEUE_DEPTH;<br />+    }<br />+<br />+    if (desc > ZXDH_MAX_QUEUE_DEPTH) {<br />+        PMD_DRV_LOG(WARNING, "nb_desc(%u) > max queue depth (%d), turn to max queue depth",<br />+                desc, ZXDH_MAX_QUEUE_DEPTH);<br />+        return ZXDH_MAX_QUEUE_DEPTH;<br />+    }<br />+<br />+    if (!rte_is_power_of_2(desc)) {<br />+        nb_desc = 1 << log2above(desc);<br />+        if (nb_desc > ZXDH_MAX_QUEUE_DEPTH)<br />+            nb_desc = ZXDH_MAX_QUEUE_DEPTH;<br />+        PMD_DRV_LOG(WARNING, "nb_desc(%u) turn to the next power of two (%u)",<br />+            desc, nb_desc);<br />+    }<br />+<br />+    return nb_desc;<br />+}<br />+<br />+<br /> int32_t<br /> zxdh_dev_rx_queue_setup(struct rte_eth_dev *dev,<br />             uint16_t queue_idx,<br />@@ -191,37 +230,66 @@ zxdh_dev_rx_queue_setup(struct rte_eth_dev *dev,<br />             uint32_t socket_id __rte_unused,<br />             const struct rte_eth_rxconf *rx_conf,<br />             struct rte_mempool *mp)<br />+{<br />+    struct zxdh_hw *hw = dev->data->dev_private;<br />+    uint16_t valid_nb_desc = 0;<br />+<br />+    if (rx_conf->rx_deferred_start) {<br />+        PMD_RX_LOG(ERR, "Rx deferred start is not supported");<br />+        return -EINVAL;<br />+    }<br />+<br />+    valid_nb_desc = zxdh_queue_desc_pre_setup(nb_desc);<br />+    if (dev->data->nb_rx_queues != hw->rx_qnum ||<br />+        valid_nb_desc != hw->queue_conf->conf[queue_idx].rx_nb_desc) {<br />+        PMD_RX_LOG(DEBUG, "rx queue changed. rxq:[%d], hw->rxq:[%d], nb_desc:%d, hw->nb_desc:%d",<br />+            dev->data->nb_rx_queues, hw->rx_qnum, valid_nb_desc,<br />+            hw->queue_conf->conf[queue_idx].rx_nb_desc);<br />+        hw->queue_conf->queue_changed = 1;<br />+    }<br />+<br />+    rte_memcpy(&hw->queue_conf->conf[queue_idx].zxdh_rx_conf,<br />+        rx_conf, sizeof(struct rte_eth_rxconf));<br />+    hw->queue_conf->conf[queue_idx].rx_nb_desc = valid_nb_desc;<br />+    hw->queue_conf->conf[queue_idx].queue_mp = mp;<br />+<br />+    return 0;<br />+}<br />+<br />+int32_t<br />+zxdh_rx_queue_config(struct rte_eth_dev *dev, uint16_t queue_idx)<br /> {<br />     struct zxdh_hw *hw = dev->data->dev_private;<br />     uint16_t vtpci_logic_qidx = 2 * queue_idx + ZXDH_RQ_QUEUE_IDX;<br />     struct zxdh_virtqueue *vq = hw->vqs[vtpci_logic_qidx];<br />     int32_t ret = 0;<br />  <br />-    if (rx_conf->rx_deferred_start) {<br />-        PMD_RX_LOG(ERR, "Rx deferred start is not supported");<br />+    if (!hw->queue_conf) {<br />+        PMD_RX_LOG(ERR, "rx queue config failed queue_conf is NULL, queue-idx:%d",<br />+                queue_idx);<br />         return -EINVAL;<br />     }<br />+<br />+    struct rte_eth_rxconf *rx_conf = &hw->queue_conf->conf[queue_idx].zxdh_rx_conf;<br />     uint16_t rx_free_thresh = rx_conf->rx_free_thresh;<br />  <br />     if (rx_free_thresh == 0)<br />         rx_free_thresh = RTE_MIN(vq->vq_nentries / 4, ZXDH_RX_FREE_THRESH);<br />  <br />-    /* rx_free_thresh must be multiples of four. */<br />     if (rx_free_thresh & 0x3) {<br />         PMD_RX_LOG(ERR, "(rx_free_thresh=%u port=%u queue=%u)",<br />             rx_free_thresh, dev->data->port_id, queue_idx);<br />         return -EINVAL;<br />     }<br />-    /* rx_free_thresh must be less than the number of RX entries */<br />     if (rx_free_thresh >= vq->vq_nentries) {<br />         PMD_RX_LOG(ERR, "RX entries (%u). (rx_free_thresh=%u port=%u queue=%u)",<br />             vq->vq_nentries, rx_free_thresh, dev->data->port_id, queue_idx);<br />         return -EINVAL;<br />     }<br />+<br />     vq->vq_free_thresh = rx_free_thresh;<br />-    nb_desc = ZXDH_QUEUE_DEPTH;<br />  <br />-    vq->vq_free_cnt = RTE_MIN(vq->vq_free_cnt, nb_desc);<br />+    vq->vq_free_cnt = RTE_MIN(vq->vq_free_cnt, hw->queue_conf->conf[queue_idx].rx_nb_desc);<br />     struct zxdh_virtnet_rx *rxvq = &vq->rxq;<br />  <br />     rxvq->queue_id = vtpci_logic_qidx;<br />@@ -231,6 +299,7 @@ zxdh_dev_rx_queue_setup(struct rte_eth_dev *dev,<br />     if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO)<br />         mbuf_min_size = ZXDH_MBUF_SIZE_4K;<br />  <br />+    struct rte_mempool *mp = hw->queue_conf->conf[queue_idx].queue_mp;<br />     ret = zxdh_check_mempool(mp, RTE_PKTMBUF_HEADROOM, mbuf_min_size);<br />     if (ret != 0) {<br />         PMD_RX_LOG(ERR,<br />@@ -238,6 +307,7 @@ zxdh_dev_rx_queue_setup(struct rte_eth_dev *dev,<br />         return -EINVAL;<br />     }<br />     rxvq->mpool = mp;<br />+<br />     if (queue_idx < dev->data->nb_rx_queues)<br />         dev->data->rx_queues[queue_idx] = rxvq;<br />  <br />@@ -251,21 +321,48 @@ zxdh_dev_tx_queue_setup(struct rte_eth_dev *dev,<br />             uint32_t socket_id __rte_unused,<br />             const struct rte_eth_txconf *tx_conf)<br /> {<br />-    uint16_t vtpci_logic_qidx = 2 * queue_idx + ZXDH_TQ_QUEUE_IDX;<br />     struct zxdh_hw *hw = dev->data->dev_private;<br />-    struct zxdh_virtqueue *vq = hw->vqs[vtpci_logic_qidx];<br />-    struct zxdh_virtnet_tx *txvq = NULL;<br />-    uint16_t tx_free_thresh = 0;<br />+    uint16_t valid_nb_desc = 0;<br />  <br />     if (tx_conf->tx_deferred_start) {<br />         PMD_TX_LOG(ERR, "Tx deferred start is not supported");<br />         return -EINVAL;<br />     }<br />  <br />-    nb_desc = ZXDH_QUEUE_DEPTH;<br />+    valid_nb_desc = zxdh_queue_desc_pre_setup(nb_desc);<br />+    if (dev->data->nb_tx_queues != hw->tx_qnum ||<br />+        valid_nb_desc != hw->queue_conf->conf[queue_idx].tx_nb_desc){<br />+        PMD_TX_LOG(DEBUG, "tx queue changed. txq:[%d], hw->txq:[%d], nb_desc:%d, hw->nb_desc:%d",<br />+            dev->data->nb_tx_queues, hw->tx_qnum, valid_nb_desc,<br />+            hw->queue_conf->conf[queue_idx].tx_nb_desc);<br />+        hw->queue_conf->queue_changed = 1;<br />+    }<br />+<br />+    rte_memcpy(&hw->queue_conf->conf[queue_idx].zxdh_tx_conf,<br />+        tx_conf, sizeof(struct rte_eth_txconf));<br />+    hw->queue_conf->conf[queue_idx].tx_nb_desc = valid_nb_desc;<br />+<br />+    return 0;<br />+}<br />+<br />+int32_t<br />+zxdh_tx_queue_config(struct rte_eth_dev *dev, uint16_t queue_idx)<br />+{<br />+    struct zxdh_hw *hw = dev->data->dev_private;<br />+    struct zxdh_virtnet_tx *txvq = NULL;<br />+    uint16_t vtpci_logic_qidx = 2 * queue_idx + ZXDH_TQ_QUEUE_IDX;<br />+    struct zxdh_virtqueue *vq = hw->vqs[vtpci_logic_qidx];<br />+    uint16_t tx_free_thresh = 0;<br />+<br />+    if (!hw->queue_conf) {<br />+        PMD_TX_LOG(ERR, "tx queue config failed queue_conf is NULL, queue_idx:%d",<br />+                queue_idx);<br />+        return -EINVAL;<br />+    }<br />  <br />-    vq->vq_free_cnt = RTE_MIN(vq->vq_free_cnt, nb_desc);<br />+    struct rte_eth_txconf *tx_conf = &hw->queue_conf->conf[queue_idx].zxdh_tx_conf;<br />  <br />+    vq->vq_free_cnt = RTE_MIN(vq->vq_free_cnt, hw->queue_conf->conf[queue_idx].tx_nb_desc);<br />     txvq = &vq->txq;<br />     txvq->queue_id = vtpci_logic_qidx;<br />  <br />@@ -273,15 +370,14 @@ zxdh_dev_tx_queue_setup(struct rte_eth_dev *dev,<br />     if (tx_free_thresh == 0)<br />         tx_free_thresh = RTE_MIN(vq->vq_nentries / 4, ZXDH_TX_FREE_THRESH);<br />  <br />-    /* tx_free_thresh must be less than the number of TX entries minus 3 */<br />     if (tx_free_thresh >= (vq->vq_nentries - 3)) {<br />-        PMD_TX_LOG(ERR, "TX entries - 3 (%u). (tx_free_thresh=%u port=%u queue=%u)",<br />-                vq->vq_nentries - 3, tx_free_thresh, dev->data->port_id, queue_idx);<br />+        PMD_TX_LOG(ERR, "tx_free_thresh must be less than the number of TX entries minus 3 (%u). (tx_free_thresh=%u port=%u queue=%u)",<br />+                    vq->vq_nentries - 3,<br />+                    tx_free_thresh, dev->data->port_id, queue_idx);<br />         return -EINVAL;<br />     }<br />  <br />     vq->vq_free_thresh = tx_free_thresh;<br />-<br />     if (queue_idx < dev->data->nb_tx_queues)<br />         dev->data->tx_queues[queue_idx] = txvq;<br />  <br />@@ -337,19 +433,14 @@ int32_t zxdh_enqueue_recv_refill_packed(struct zxdh_virtqueue *vq,<br />     return 0;<br /> }<br />  <br />-int32_t zxdh_dev_rx_queue_setup_finish(struct rte_eth_dev *dev, uint16_t logic_qidx)<br />+int32_t zxdh_dev_rx_queue_setup_finish(struct rte_eth_dev *dev, uint16_t queue_idx)<br /> {<br />     struct zxdh_hw *hw = dev->data->dev_private;<br />+    uint16_t logic_qidx = ((queue_idx << 1) + ZXDH_RQ_QUEUE_IDX) % ZXDH_QUEUES_NUM_MAX;<br />     struct zxdh_virtqueue *vq = hw->vqs[logic_qidx];<br />     struct zxdh_virtnet_rx *rxvq = &vq->rxq;<br />-    uint16_t desc_idx;<br />     int32_t error = 0;<br />  <br />-    /* Allocate blank mbufs for the each rx descriptor */<br />-    memset(&rxvq->fake_mbuf, 0, sizeof(rxvq->fake_mbuf));<br />-    for (desc_idx = 0; desc_idx < ZXDH_MBUF_BURST_SZ; desc_idx++)<br />-        vq->sw_ring[vq->vq_nentries + desc_idx] = &rxvq->fake_mbuf;<br />-<br />     while (!zxdh_queue_full(vq)) {<br />         struct rte_mbuf *new_pkts[ZXDH_MBUF_BURST_SZ];<br />         uint16_t free_cnt = RTE_MIN(ZXDH_MBUF_BURST_SZ, vq->vq_free_cnt);<br />diff --git a/drivers/net/zxdh/zxdh_queue.h b/drivers/net/zxdh/zxdh_queue.h<br />index 1a54e7cfc9..3c89687d45 100644<br />--- a/drivers/net/zxdh/zxdh_queue.h<br />+++ b/drivers/net/zxdh/zxdh_queue.h<br />@@ -21,6 +21,14 @@ enum { ZXDH_VTNET_RQ = 0, ZXDH_VTNET_TQ = 1 };<br /> #define ZXDH_TQ_QUEUE_IDX                 1<br /> #define ZXDH_MAX_TX_INDIRECT              8<br />  <br />+#define ZXDH_MIN_QUEUE_DEPTH              512<br />+#define ZXDH_MAX_QUEUE_DEPTH              32768<br />+<br />+#define ZXDH_TX_FREE_THRESH               32<br />+#define ZXDH_RX_FREE_THRESH               32<br />+<br />+#define ZXDH_MBUF_SIZE_4K                 4096<br />+<br /> /* This marks a buffer as continuing via the next field. */<br /> #define ZXDH_VRING_DESC_F_NEXT                 1<br />  <br />@@ -424,5 +432,6 @@ int32_t zxdh_dev_rx_queue_setup_finish(struct rte_eth_dev *dev, uint16_t logic_q<br /> void zxdh_queue_rxvq_flush(struct zxdh_virtqueue *vq);<br /> int32_t zxdh_enqueue_recv_refill_packed(struct zxdh_virtqueue *vq,<br />             struct rte_mbuf **cookie, uint16_t num);<br />-<br />+int32_t zxdh_tx_queue_config(struct rte_eth_dev *dev, uint16_t queue_idx);<br />+int32_t zxdh_rx_queue_config(struct rte_eth_dev *dev, uint16_t queue_idx);<br /> #endif /* ZXDH_QUEUE_H */<br />--  <br />2.27.0<br />