patch 'net/mlx5: fix flow tag indexes support on root table' has been queued to stable release 24.11.4
Kevin Traynor
ktraynor at redhat.com
Fri Nov 21 12:21:15 CET 2025
Hi,
FYI, your patch has been queued to stable release 24.11.4
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/26/25. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/f51c87d86608c160d23b81c566e9b489837cacf5
Thanks.
Kevin
---
>From f51c87d86608c160d23b81c566e9b489837cacf5 Mon Sep 17 00:00:00 2001
From: Dariusz Sosnowski <dsosnowski at nvidia.com>
Date: Fri, 14 Nov 2025 21:17:20 +0100
Subject: [PATCH] net/mlx5: fix flow tag indexes support on root table
[ upstream commit 3087db16ab13cdd6996b1f3ea8c64171c2e8fd8f ]
Offending patch introduced support for additional flow tag indexes
with HW Steering flow engine. New tag indexes will be mapped
to HW registers REG_C_8 to REG_C_11, depending on HW capabilities.
That patch only handled tables created on group > 0 (non-root table),
where mlx5 PMD directly configures the HW.
Tables and flow rules on group 0 (root table) are handled through
kernel driver, and new registers were not addressed for that case.
Because of that, usage of unsupported tag index in group 0
triggered an assertion in flow_dv_match_meta_reg().
This patch adds necessary definitions for REG_C_8 to REG_C_11 to make
these registers usable for flow tag indexes in root table.
Validation of flow tag to HW register translation is also amended
to report invalid cases to the user, instead of relying on assertions.
Fixes: 7e3a14423c1a ("net/mlx5/hws: support 4 additional C registers")
Signed-off-by: Dariusz Sosnowski <dsosnowski at nvidia.com>
---
drivers/common/mlx5/mlx5_prm.h | 6 ++++-
drivers/net/mlx5/mlx5_flow.h | 3 ++-
drivers/net/mlx5/mlx5_flow_dv.c | 40 ++++++++++++++++++++++++++++-----
3 files changed, 41 insertions(+), 8 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index d24fd197ba..4f45b104ae 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -1203,5 +1203,9 @@ struct mlx5_ifc_fte_match_set_misc5_bits {
u8 tunnel_header_2[0x20];
u8 tunnel_header_3[0x20];
- u8 reserved[0x100];
+ u8 reserved[0x80];
+ u8 metadata_reg_c_8[0x20];
+ u8 metadata_reg_c_9[0x20];
+ u8 metadata_reg_c_10[0x20];
+ u8 metadata_reg_c_11[0x20];
};
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 5f154add0d..bb11ad204e 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1785,5 +1785,6 @@ flow_hw_get_reg_id_by_domain(struct rte_eth_dev *dev,
if (id == RTE_PMD_MLX5_LINEAR_HASH_TAG_INDEX)
return REG_C_3;
- MLX5_ASSERT(id < MLX5_FLOW_HW_TAGS_MAX);
+ if (id >= MLX5_FLOW_HW_TAGS_MAX)
+ return REG_NON;
return reg->hw_avl_tags[id];
default:
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index c8b17c0f3a..3303fb2cbd 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -10553,6 +10553,6 @@ flow_dv_match_meta_reg(void *key, enum modify_reg reg_type,
uint32_t data, uint32_t mask)
{
- void *misc2_v =
- MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
+ void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
+ void *misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
uint32_t temp;
@@ -10600,4 +10600,16 @@ flow_dv_match_meta_reg(void *key, enum modify_reg reg_type,
MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
break;
+ case REG_C_8:
+ MLX5_SET(fte_match_set_misc5, misc5_v, metadata_reg_c_8, data);
+ break;
+ case REG_C_9:
+ MLX5_SET(fte_match_set_misc5, misc5_v, metadata_reg_c_9, data);
+ break;
+ case REG_C_10:
+ MLX5_SET(fte_match_set_misc5, misc5_v, metadata_reg_c_10, data);
+ break;
+ case REG_C_11:
+ MLX5_SET(fte_match_set_misc5, misc5_v, metadata_reg_c_11, data);
+ break;
default:
MLX5_ASSERT(false);
@@ -10818,6 +10830,9 @@ flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev, void *key,
* @param[in] key_type
* Set flow matcher mask or value.
+ *
+ * @return
+ * 0 on success. Negative errno value otherwise.
*/
-static void
+static int
flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,
const struct rte_flow_item *item,
@@ -10831,5 +10846,5 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,
if (MLX5_ITEM_VALID(item, key_type))
- return;
+ return 0;
MLX5_ITEM_UPDATE(item, key_type, tag_v, tag_m,
&rte_flow_item_tag_mask);
@@ -10841,6 +10856,16 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,
else
reg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, index);
- MLX5_ASSERT(reg > 0);
+ if (reg < 0) {
+ DRV_LOG(ERR, "port %u tag index %u does not map to correct register",
+ dev->data->port_id, index);
+ return -EINVAL;
+ }
+ if (reg == REG_NON) {
+ DRV_LOG(ERR, "port %u tag index %u maps to unsupported register",
+ dev->data->port_id, index);
+ return -ENOTSUP;
+ }
flow_dv_match_meta_reg(key, (enum modify_reg)reg, tag_v->data, tag_m->data);
+ return 0;
}
@@ -14389,5 +14414,8 @@ flow_dv_translate_items(struct rte_eth_dev *dev,
break;
case RTE_FLOW_ITEM_TYPE_TAG:
- flow_dv_translate_item_tag(dev, key, items, key_type);
+ ret = flow_dv_translate_item_tag(dev, key, items, key_type);
+ if (ret < 0)
+ return rte_flow_error_set(error, -ret, RTE_FLOW_ERROR_TYPE_ITEM, NULL,
+ "invalid flow tag item");
last_item = MLX5_FLOW_ITEM_TAG;
break;
--
2.51.0
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2025-11-21 11:05:12.388516836 +0000
+++ 0091-net-mlx5-fix-flow-tag-indexes-support-on-root-table.patch 2025-11-21 11:05:09.610201796 +0000
@@ -1 +1 @@
-From 3087db16ab13cdd6996b1f3ea8c64171c2e8fd8f Mon Sep 17 00:00:00 2001
+From f51c87d86608c160d23b81c566e9b489837cacf5 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 3087db16ab13cdd6996b1f3ea8c64171c2e8fd8f ]
+
@@ -24 +25,0 @@
-Cc: stable at dpdk.org
@@ -34 +35 @@
-index 6cde3f8f1a..9383e09893 100644
+index d24fd197ba..4f45b104ae 100644
@@ -37 +38 @@
-@@ -1206,5 +1206,9 @@ struct mlx5_ifc_fte_match_set_misc5_bits {
+@@ -1203,5 +1203,9 @@ struct mlx5_ifc_fte_match_set_misc5_bits {
@@ -49 +50 @@
-index db408d7b38..8159008504 100644
+index 5f154add0d..bb11ad204e 100644
@@ -52 +53 @@
-@@ -1838,5 +1838,6 @@ flow_hw_get_reg_id_by_domain(struct rte_eth_dev *dev,
+@@ -1785,5 +1785,6 @@ flow_hw_get_reg_id_by_domain(struct rte_eth_dev *dev,
@@ -61 +62 @@
-index 83046418c4..47f6d28410 100644
+index c8b17c0f3a..3303fb2cbd 100644
@@ -64 +65 @@
-@@ -10555,6 +10555,6 @@ flow_dv_match_meta_reg(void *key, enum modify_reg reg_type,
+@@ -10553,6 +10553,6 @@ flow_dv_match_meta_reg(void *key, enum modify_reg reg_type,
@@ -73 +74 @@
-@@ -10602,4 +10602,16 @@ flow_dv_match_meta_reg(void *key, enum modify_reg reg_type,
+@@ -10600,4 +10600,16 @@ flow_dv_match_meta_reg(void *key, enum modify_reg reg_type,
@@ -90 +91 @@
-@@ -10820,6 +10832,9 @@ flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev, void *key,
+@@ -10818,6 +10830,9 @@ flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev, void *key,
@@ -101 +102 @@
-@@ -10833,5 +10848,5 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,
+@@ -10831,5 +10846,5 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,
@@ -108 +109 @@
-@@ -10843,6 +10858,16 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,
+@@ -10841,6 +10856,16 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev, void *key,
@@ -126 +127 @@
-@@ -14403,5 +14428,8 @@ flow_dv_translate_items(struct rte_eth_dev *dev,
+@@ -14389,5 +14414,8 @@ flow_dv_translate_items(struct rte_eth_dev *dev,
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