Rosen, Rami rami.rosen at intel.com
Sun Aug 20 22:41:05 CEST 2017

This is more an educated guess as I did not actually worked with this DPDK feature with i40E, but I did work 
with interrupt coalescing/interrupt throttling with kernel drivers
of a different vendor so I hope it makes sense:

I suggest first take a look here:

The idea is quite simple: delaying interrupts for a predefined interval of time. There is a tradeoff between latency and performance, and for sure with light loads, interrupt coalescing adds latency, and in high load, the performance is improved, as is stated in the link above. Seems that optimization should be done according to the profile of traffic load in a given setup.

Anyhow, it seems that this config item (CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL) is used in a simple linear method to calculate the time interval of interrupt delay (all it does is align it to microseconds, according to my understanding): 

i40e_calc_itr_interval(int16_t interval)
	/* Convert to hardware count, as writing each 1 represents 2 us */
	return interval / 2;

And this config item can get at most 8260 us;
(#define I40E_QUEUE_ITR_INTERVAL_MAX     8160, i40e_ethdev.h)

So maybe according to your setup and the traffic load, you may want to benchmark optimizing this value in the range 1-8160.

Rami Rosen

-----Original Message-----
From: users [mailto:users-bounces at dpdk.org] On Behalf Of Dorsett, Michal
Sent: Saturday, August 19, 2017 12:21
To: users at dpdk.org
Subject: [dpdk-users] RTE_LIBRTE_I40E_ITR_INTERVAL


We are using DPDK 16.07.

In the documentation for the libpmd_i40e I read the following explanation re. RTE_LIBRTE_I40E_ITR_INTERVAL:

Due to the hardware design, the interrupt signal inside NIC is needed for per packet descriptor write-back. The minimum interval of interrupts could be set at compile time by ``CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL`` in configuration files.
Though there is a default configuration, the interval could be tuned by the users with that configuration item depends on what the user cares about more, performance or per packet latency.

However, I don't quite understand whether a larger interval should be set for performance, or a lower (I am interested in performance).


Michal Dorsett
Developer, Strategic IP Group
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Verint Cyber Intelligence

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