[dpdk-users] Consulting the usage of rte_mb in memif rx/tx path

[Phil Yang (Arm Technology China)]

Hi Jakub,

I am trying to understand the rte_mb() in eth_memif_rx/tx functions. What's the purpose of this barrier?
https://github.com/DPDK/dpdk/blob/master/drivers/net/memif/rte_eth_memif.c

In my understanding, the RX and TX processes are handling in the same core (e.g the testpmd forwarding engine) on each side (Master/Salve).
x86 platform guarantees that all stores are visible in program order and load-load are also in program order. And it has data dependence between the before-rte_mb and the after-rte_mb operation (update ring->head/tail). So why do we need this barrier?

BTW, on Aarch64, the rte_mb() is a 'DSB SY', which will stop the pipeline. So after removed this barrier, the testpmd with memif vPMD got 3.5% performance improvement.

Best Regards,
Phil Yang