root@seroics05590:~/ejaeham/testpmd# ls dpdk-testpmd libjansson.so.4 export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/root/ejaeham/testpmd/ ./dpdk-testpmd -v --in-memory -a 12:01.0 -a 12:01.1,dv_flow_en=0 --log-level=pmd,8 -- -i EAL: Detected 64 lcore(s) EAL: Detected 2 NUMA nodes EAL: RTE Version: 'DPDK 20.11.0' EAL: Selected IOVA mode 'VA' EAL: Probing VFIO support... EAL: VFIO support initialized EAL: Probe PCI driver: mlx5_pci (15b3:1016) device: 0000:12:01.0 (socket 0) mlx5_pci: checking device "mlx5_67" mlx5_pci: checking device "mlx5_66" mlx5_pci: checking device "mlx5_65" mlx5_pci: checking device "mlx5_64" mlx5_pci: checking device "mlx5_63" mlx5_pci: checking device "mlx5_62" mlx5_pci: checking device "mlx5_61" mlx5_pci: checking device "mlx5_60" mlx5_pci: checking device "mlx5_59" mlx5_pci: checking device "mlx5_58" mlx5_pci: checking device "mlx5_57" mlx5_pci: checking device "mlx5_56" mlx5_pci: checking device "mlx5_55" mlx5_pci: checking device "mlx5_54" mlx5_pci: checking device "mlx5_53" mlx5_pci: checking device "mlx5_52" mlx5_pci: checking device "mlx5_51" mlx5_pci: checking device "mlx5_50" mlx5_pci: checking device "mlx5_49" mlx5_pci: checking device "mlx5_48" mlx5_pci: checking device "mlx5_47" mlx5_pci: checking device "mlx5_46" mlx5_pci: checking device "mlx5_45" mlx5_pci: checking device "mlx5_44" mlx5_pci: checking device "mlx5_43" mlx5_pci: checking device "mlx5_42" mlx5_pci: checking device "mlx5_41" mlx5_pci: checking device "mlx5_40" mlx5_pci: checking device "mlx5_39" mlx5_pci: checking device "mlx5_38" mlx5_pci: checking device "mlx5_37" mlx5_pci: checking device "mlx5_36" mlx5_pci: checking device "mlx5_35" mlx5_pci: checking device "mlx5_34" mlx5_pci: checking device "mlx5_33" mlx5_pci: checking device "mlx5_32" mlx5_pci: checking device "mlx5_31" mlx5_pci: checking device "mlx5_30" mlx5_pci: checking device "mlx5_29" mlx5_pci: checking device "mlx5_28" mlx5_pci: checking device "mlx5_27" mlx5_pci: checking device "mlx5_26" mlx5_pci: PCI information matches for device "mlx5_26" mlx5_pci: checking device "mlx5_25" mlx5_pci: checking device "mlx5_24" mlx5_pci: checking device "mlx5_23" mlx5_pci: checking device "mlx5_22" mlx5_pci: checking device "mlx5_21" mlx5_pci: checking device "mlx5_20" mlx5_pci: checking device "mlx5_19" mlx5_pci: checking device "mlx5_18" mlx5_pci: checking device "mlx5_17" mlx5_pci: checking device "mlx5_16" mlx5_pci: checking device "mlx5_15" mlx5_pci: checking device "mlx5_14" mlx5_pci: checking device "mlx5_13" mlx5_pci: checking device "mlx5_12" mlx5_pci: checking device "mlx5_11" mlx5_pci: checking device "mlx5_10" mlx5_pci: checking device "mlx5_9" mlx5_pci: checking device "mlx5_8" mlx5_pci: checking device "mlx5_7" mlx5_pci: checking device "mlx5_6" mlx5_pci: checking device "mlx5_5" mlx5_pci: checking device "mlx5_4" mlx5_pci: checking device "mlx5_3" mlx5_pci: checking device "mlx5_2" mlx5_pci: checking device "mlx5_1" mlx5_pci: checking device "mlx5_0" mlx5_pci: no E-Switch support detected mlx5_pci: naming Ethernet device "12:01.0" common_mlx5: RTE_MEM is selected. mlx5_pci: DevX is NOT supported mlx5_pci: MPW isn't supported mlx5_pci: SWP support: 0 mlx5_pci: tunnel offloading is supported mlx5_pci: MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration mlx5_pci: checksum offloading is supported mlx5_pci: counters are not supported mlx5_pci: DV flow is not supported mlx5_pci: maximum Rx indirection table size is 512 mlx5_pci: VLAN stripping is supported mlx5_pci: MPS is disabled mlx5_pci: FCS stripping configuration is supported mlx5_pci: port 0 MAC address is c6:f3:9f:82:16:65 mlx5_pci: port 0 MTU is 1500 mlx5_pci: port 0 forcing Ethernet interface up mlx5_pci: min tx inline configured: 18 mlx5_pci: port 0 flow maximum priority: 5 mlx5_pci: metadata mode 0 mlx5_pci: metadata MARK mask 00FFFFFF mlx5_pci: metadata META mask FFFFFFFF mlx5_pci: metadata reg_c0 mask FFFFFFFF mlx5_pci: Cache list hrxq initialized. mlx5_pci: port 0 extensive metadata register is not supported EAL: Probe PCI driver: mlx5_pci (15b3:1016) device: 0000:12:01.1 (socket 0) mlx5_pci: checking device "mlx5_67" mlx5_pci: checking device "mlx5_66" mlx5_pci: checking device "mlx5_65" mlx5_pci: checking device "mlx5_64" mlx5_pci: checking device "mlx5_63" mlx5_pci: checking device "mlx5_62" mlx5_pci: checking device "mlx5_61" mlx5_pci: checking device "mlx5_60" mlx5_pci: checking device "mlx5_59" mlx5_pci: checking device "mlx5_58" mlx5_pci: checking device "mlx5_57" mlx5_pci: checking device "mlx5_56" mlx5_pci: checking device "mlx5_55" mlx5_pci: checking device "mlx5_54" mlx5_pci: checking device "mlx5_53" mlx5_pci: checking device "mlx5_52" mlx5_pci: checking device "mlx5_51" mlx5_pci: checking device "mlx5_50" mlx5_pci: checking device "mlx5_49" mlx5_pci: checking device "mlx5_48" mlx5_pci: checking device "mlx5_47" mlx5_pci: checking device "mlx5_46" mlx5_pci: checking device "mlx5_45" mlx5_pci: checking device "mlx5_44" mlx5_pci: checking device "mlx5_43" mlx5_pci: checking device "mlx5_42" mlx5_pci: checking device "mlx5_41" mlx5_pci: checking device "mlx5_40" mlx5_pci: checking device "mlx5_39" mlx5_pci: checking device "mlx5_38" mlx5_pci: checking device "mlx5_37" mlx5_pci: checking device "mlx5_36" mlx5_pci: checking device "mlx5_35" mlx5_pci: checking device "mlx5_34" mlx5_pci: checking device "mlx5_33" mlx5_pci: checking device "mlx5_32" mlx5_pci: checking device "mlx5_31" mlx5_pci: checking device "mlx5_30" mlx5_pci: checking device "mlx5_29" mlx5_pci: checking device "mlx5_28" mlx5_pci: checking device "mlx5_27" mlx5_pci: PCI information matches for device "mlx5_27" mlx5_pci: checking device "mlx5_26" mlx5_pci: checking device "mlx5_25" mlx5_pci: checking device "mlx5_24" mlx5_pci: checking device "mlx5_23" mlx5_pci: checking device "mlx5_22" mlx5_pci: checking device "mlx5_21" mlx5_pci: checking device "mlx5_20" mlx5_pci: checking device "mlx5_19" mlx5_pci: checking device "mlx5_18" mlx5_pci: checking device "mlx5_17" mlx5_pci: checking device "mlx5_16" mlx5_pci: checking device "mlx5_15" mlx5_pci: checking device "mlx5_14" mlx5_pci: checking device "mlx5_13" mlx5_pci: checking device "mlx5_12" mlx5_pci: checking device "mlx5_11" mlx5_pci: checking device "mlx5_10" mlx5_pci: checking device "mlx5_9" mlx5_pci: checking device "mlx5_8" mlx5_pci: checking device "mlx5_7" mlx5_pci: checking device "mlx5_6" mlx5_pci: checking device "mlx5_5" mlx5_pci: checking device "mlx5_4" mlx5_pci: checking device "mlx5_3" mlx5_pci: checking device "mlx5_2" mlx5_pci: checking device "mlx5_1" mlx5_pci: checking device "mlx5_0" mlx5_pci: no E-Switch support detected mlx5_pci: naming Ethernet device "12:01.1" mlx5_pci: DevX is NOT supported mlx5_pci: MPW isn't supported mlx5_pci: SWP support: 0 mlx5_pci: tunnel offloading is supported mlx5_pci: MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration mlx5_pci: checksum offloading is supported mlx5_pci: counters are not supported mlx5_pci: maximum Rx indirection table size is 512 mlx5_pci: VLAN stripping is supported mlx5_pci: MPS is disabled mlx5_pci: FCS stripping configuration is supported mlx5_pci: port 1 MAC address is 66:9f:7a:59:59:0f mlx5_pci: port 1 MTU is 1500 mlx5_pci: port 1 forcing Ethernet interface up mlx5_pci: min tx inline configured: 18 mlx5_pci: port 1 flow maximum priority: 5 mlx5_pci: metadata mode 0 mlx5_pci: metadata MARK mask 00FFFFFF mlx5_pci: metadata META mask FFFFFFFF mlx5_pci: metadata reg_c0 mask FFFFFFFF mlx5_pci: Cache list hrxq initialized. mlx5_pci: port 1 extensive metadata register is not supported Interactive-mode selected testpmd: create a new mbuf pool : n=451456, size=2176, socket=0 testpmd: preferred mempool ops selected: ring_mp_mc testpmd: create a new mbuf pool : n=451456, size=2176, socket=1 testpmd: preferred mempool ops selected: ring_mp_mc Configuring Port 0 (socket 0) mlx5_pci: port 0 Tx queues number update: 0 -> 1 mlx5_pci: port 0 Rx queues number update: 0 -> 1 mlx5_pci: port 0 configuring queue 0 for 256 descriptors mlx5_pci: port 0 adding Tx queue 0 to list mlx5_pci: port 0 configuring Rx queue 0 for 256 descriptors mlx5_pci: port 0 maximum number of segments per packet: 1 mlx5_pci: port 0 Rx Queue 0 max LRO message size adjusted to 1280 bytes mlx5_pci: port 0 CRC stripping is enabled, 0 bytes will be subtracted from incoming frames to hide it mlx5_pci: port 0 adding Rx queue 0 to list mlx5_pci: port 0 starting device mlx5_pci: port 0 Rx queues number update: 1 -> 1 mlx5_pci: port 0 Tx queue 0 allocated and configured 256 WRs mlx5_pci: Port 0: uar_mmap_offset 0x900000. mlx5_pci: Port 0 txq 0 updated with 0x18027a428. mlx5_pci: Port 0 device_attr.max_qp_wr is 32768. mlx5_pci: Port 0 device_attr.max_sge is 30. mlx5_pci: Port 0 Rx queue registering mp mb_pool_0 having 1 chunks. common_mlx5: Creating a MR using address (0x1804796c0) common_mlx5: Inserting MR(0x180274e80) to global cache(0x17ffd5e30) common_mlx5: inserted B-tree(0x17ffd5e38)[1], [0x140000000, 0x1c0000000) lkey=0x30100 common_mlx5: inserted B-tree(0x180278234)[1], [0x140000000, 0x1c0000000) lkey=0x30100 mlx5_pci: port 0 SPRQ queue 0 allocated and configured 256 segments (max 256 packets) mlx5_pci: Port 0 rxq 0 updated with 0x180278598. mlx5_pci: Cache list hrxq entry 0x180244200 new: 1. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 9. mlx5_pci: port 0 has selected Tx function supporting offloads 0010/0050 mlx5_pci: INLIN (inline data) mlx5_pci: METAD (tx Flow metadata) mlx5_pci: port 0 selected vectorized SPRQ Rx function mlx5_pci: port 0 setting primary MAC address mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x180244200 removed. mlx5_pci: Cache list hrxq entry 0x180244200 new: 1. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 9. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x180244200 removed. mlx5_pci: Cache list hrxq entry 0x180244200 new: 1. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 9. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x180244200 removed. mlx5_pci: Cache list hrxq entry 0x180244200 new: 1. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 9. Port 0: C6:F3:9F:82:16:65 Configuring Port 1 (socket 0) mlx5_pci: port 1 Tx queues number update: 0 -> 1 mlx5_pci: port 1 Rx queues number update: 0 -> 1 mlx5_pci: port 1 configuring queue 0 for 256 descriptors mlx5_pci: port 1 adding Tx queue 0 to list mlx5_pci: port 1 configuring Rx queue 0 for 256 descriptors mlx5_pci: port 1 maximum number of segments per packet: 1 mlx5_pci: port 1 Rx Queue 0 max LRO message size adjusted to 1280 bytes mlx5_pci: port 1 CRC stripping is enabled, 0 bytes will be subtracted from incoming frames to hide it mlx5_pci: port 1 adding Rx queue 0 to list mlx5_pci: port 1 starting device mlx5_pci: port 1 Rx queues number update: 1 -> 1 mlx5_pci: port 1 Tx queue 0 allocated and configured 256 WRs mlx5_pci: Port 1: uar_mmap_offset 0x900000. mlx5_pci: Port 1 txq 0 updated with 0x18026b528. mlx5_pci: Port 1 device_attr.max_qp_wr is 32768. mlx5_pci: Port 1 device_attr.max_sge is 30. mlx5_pci: Port 1 Rx queue registering mp mb_pool_0 having 1 chunks. common_mlx5: Creating a MR using address (0x1804796c0) common_mlx5: Inserting MR(0x18026b100) to global cache(0x17ff800f0) common_mlx5: inserted B-tree(0x17ff800f8)[1], [0x140000000, 0x1c0000000) lkey=0x30900 common_mlx5: inserted B-tree(0x180241ff4)[1], [0x140000000, 0x1c0000000) lkey=0x30900 mlx5_pci: port 1 SPRQ queue 0 allocated and configured 256 segments (max 256 packets) mlx5_pci: Port 1 rxq 0 updated with 0x180242358. mlx5_pci: Cache list hrxq entry 0x18020e200 new: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 9. mlx5_pci: port 1 has selected Tx function supporting offloads 0010/0050 mlx5_pci: INLIN (inline data) mlx5_pci: METAD (tx Flow metadata) mlx5_pci: port 1 selected vectorized SPRQ Rx function mlx5_pci: port 1 setting primary MAC address mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 removed. mlx5_pci: Cache list hrxq entry 0x18020e200 new: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 9. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 removed. mlx5_pci: Cache list hrxq entry 0x18020e200 new: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 9. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 removed. mlx5_pci: Cache list hrxq entry 0x18020e200 new: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 9. Port 1: 66:9F:7A:59:59:0F Checking link statuses... Done mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x180244200 removed. mlx5_pci: Cache list hrxq entry 0x180244200 new: 1. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 9. mlx5_pci: Cache list hrxq entry 0x180244200 ref++: 10. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 9. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref--: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 removed. mlx5_pci: Cache list hrxq entry 0x18020e200 new: 1. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 2. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 3. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 4. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 5. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 6. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 7. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 8. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 9. mlx5_pci: Cache list hrxq entry 0x18020e200 ref++: 10. testpmd>