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<p class="MsoNormal">Hi,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I believe the suggestion here would be to try the new “rx_low_latency=1” option enabled with DPDK 21.11:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:0in;margin-right:0in;margin-bottom:9.0pt;margin-left:.75in;text-indent:-.25in;line-height:18.0pt;mso-list:l0 level1 lfo1;background:#FCFCFC">
<![if !supportLists]><span style="font-size:10.0pt;font-family:Symbol;color:#404040;mso-fareast-language:ZH-CN"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="font-size:9.0pt;font-family:Consolas;color:#E74C3C;border:solid #E1E4E5 1.0pt;padding:2.0pt;background:white;mso-fareast-language:ZH-CN">Low Rx latency</span><span style="font-size:12.0pt;font-family:"Lato",sans-serif;color:#404040;mso-fareast-language:ZH-CN"> (default </span><span style="font-size:9.0pt;font-family:Consolas;color:#E74C3C;border:solid #E1E4E5 1.0pt;padding:2.0pt;background:white;mso-fareast-language:ZH-CN">0</span><span style="font-size:12.0pt;font-family:"Lato",sans-serif;color:#404040;mso-fareast-language:ZH-CN">)<o:p></o:p></span></p>
<p class="MsoNormal" style="mso-margin-top-alt:0in;margin-right:0in;margin-bottom:9.0pt;margin-left:.75in;line-height:18.0pt;background:#FCFCFC">
<span style="font-size:12.0pt;font-family:"Lato",sans-serif;color:#404040;mso-fareast-language:ZH-CN">vRAN workloads require low latency DPDK interface for the front haul interface connection to Radio. By specifying </span><span style="font-size:9.0pt;font-family:Consolas;color:#E74C3C;border:solid #E1E4E5 1.0pt;padding:2.0pt;background:white;mso-fareast-language:ZH-CN">1</span><span style="font-size:12.0pt;font-family:"Lato",sans-serif;color:#404040;mso-fareast-language:ZH-CN"> for
parameter </span><span style="font-size:9.0pt;font-family:Consolas;color:#E74C3C;border:solid #E1E4E5 1.0pt;padding:2.0pt;background:white;mso-fareast-language:ZH-CN">rx_low_latency</span><span style="font-size:12.0pt;font-family:"Lato",sans-serif;color:#404040;mso-fareast-language:ZH-CN">,
each completed Rx descriptor can be written immediately to host memory and the Rx interrupt latency can be reduced to 2us:<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:.75in;background:#F8F8F8"><span style="font-size:9.0pt;font-family:Consolas;color:#404040;mso-fareast-language:ZH-CN">-a 0000:88:00.0,rx_low_latency=1<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:.75in;line-height:18.0pt;background:#FCFCFC">
<span style="font-size:12.0pt;font-family:"Lato",sans-serif;color:#404040;mso-fareast-language:ZH-CN">As a trade-off, this configuration may cause the packet processing performance degradation due to the PCI bandwidth limitation.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.5pt;mso-fareast-language:ZH-CN"><o:p> </o:p></span></p>
<p class="MsoNormal" style="text-indent:21.0pt"><span style="mso-fareast-language:ZH-CN">
<o:p></o:p></span></p>
<p class="MsoNormal" style="text-indent:21.0pt"><span style="mso-fareast-language:ZH-CN">If they are using an old DPDK version, they can try to backport below patch<o:p></o:p></span></p>
<p class="MsoNormal" style="text-indent:21.0pt"><span style="mso-fareast-language:ZH-CN"><a href="http://patchwork.dpdk.org/project/dpdk/patch/20210924093429.12068-1-alvinx.zhang@intel.com/">http://patchwork.dpdk.org/project/dpdk/patch/20210924093429.12068-1-alvinx.zhang@intel.com/</a><o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks<o:p></o:p></p>
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