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<p class="MsoNormal">Hello,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoListParagraph" style="margin-left:0in">I am having some issues with DPDK and directly DMA’ing into a buffer and I was wondering if you could provide some insight on my issue. I am using an Alpha Data 9H3 FPGA, and I want to constantly be reading
all the packets it is receiving. Currently, I set up the DPDK environment, initialize and setup the port and rx queue, get a burst of packets (128 at a time) and I publish the packet to my file system to write. I can successfully do all of this however, it
is extremely slow, I can only publish about 1.4 millions packets in a min (5.7 GB). I am generating data at around 12GB/s and I wanted to receive all the packets and process them at about 10 GB / second. Without DPDK using regular buffers and pools, I can
achieve about 3.2 GB / second or 47 million packets a minute. I believe I am not using DPDK correctly to utilize its full potential? Any insight would be greatly appreciated. Thank you!<o:p></o:p></p>
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<p class="MsoNormal">-Gilbert<o:p></o:p></p>
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