[dpdk-dev] [PATCH] Fix KNI compiling issue on IBM Power

[Neil Horman]

On Thu, Dec 04, 2014 at 12:59:31PM +0100, Thomas Monjalon wrote:
> > Because of different cache line size, the alignment of struct
> > rte_kni_mbuf in rte_kni_common.h doesn't work on IBM Power. This patch
> > changed from 64 to RTE_CACHE_LINE_SIZE micro to do the alignment.
> > 
> > Signed-off-by: Chao Zhu <chaozhu at linux.vnet.ibm.com>
> 
> Acked-by: Thomas Monjalon <thomas.monjalon at 6wind.com>
> 
> Applied
> 
Woah!  Slow down here, I'm not sure if this makes sense to fix his way.  The
exact same ifndef/define/endif construct is used for this macro in rte_memory.h.
Currently their defined to the same vaule, but if that ever changes, this macro
will return different values based on the order in which header files are
included.  That doesn't seem appropriate at all.

> I wonder if we could try to guess the cache line size instead of
> configuring it in many places.
> Maybe we could use something like sysconf(_SC_LEVEL1_DCACHE_LINESIZE)?
> 
This is a good idea, but I think its a bit broken for a few reasons:

1) _SC_LEVEL1_DCACHE_LINESIZE I don't think is POSIX mandated, so there is every
possibility that the above won't work on BSD

2) While getting the cache line size dynamically is a great idea, dpdk has
several locations that size structures based on processor cache line size, which
implicitly requires a static cache line definition.

It seems the right thing to do, in my mind is to define RTE_CACHE_LINE_SIZE per
arch (perhaps in common/include/arch/<arch>/rte_<something>.h), then just let
the build break if a given arch doesn't define it (i.e. make definig that value
an arch reqirement).

Neil

> Thanks
> -- 
> Thomas
>