[dpdk-dev] [PATCH v2] Patch introducing API to read/write Intel Architecture Model Specific Registers (MSR)...

[Wojciech Andralojc]

Patch rework based on feedback, only x86 specific functions left under lib/librte_eal/common/include/arch/x86/.

Signed-off-by: Wojciech Andralojc <wojciechx.andralojc at intel.com>
---
 lib/librte_eal/common/include/arch/x86/rte_msr.h | 158 +++++++++++++++++++++++
 1 file changed, 158 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/x86/rte_msr.h

diff --git a/lib/librte_eal/common/include/arch/x86/rte_msr.h b/lib/librte_eal/common/include/arch/x86/rte_msr.h
new file mode 100644
index 0000000..9d16633
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/x86/rte_msr.h
@@ -0,0 +1,158 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2016 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_MSR_X86_64_H_
+#define _RTE_MSR_X86_64_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <fcntl.h> //O_RDONLY
+#include <unistd.h> //pread
+
+#include <rte_debug.h>
+#include <rte_log.h>
+
+#define CPU_MSR_PATH "/dev/cpu/%u/msr"
+#define CPU_MSR_PATH_MAX_LEN 32
+
+/**
+ * This function should not be called directly.
+ * Function to open CPU's MSR file
+ */
+static int
+__msr_open_file(const unsigned lcore, int flags)
+{
+	char fname[CPU_MSR_PATH_MAX_LEN] = {0};
+	int fd = -1;
+
+	snprintf(fname, sizeof(fname) - 1, CPU_MSR_PATH, lcore);
+
+	fd = open(fname, flags);
+
+	if (fd < 0)
+		RTE_LOG(ERR, PQOS, "Error opening file '%s'!\n", fname);
+
+	return fd;
+}
+
+/**
+ * Function to read CPU's MSR
+ *
+ * @param [in] lcore
+ *  CPU logical core id
+ *
+ * @param [in] reg
+ *  MSR reg to read
+ *
+ * @param [out] value
+ *  Read value of MSR reg
+ *
+ * @return
+ *  Operations status
+*/
+
+static inline int
+rte_msr_read(const unsigned lcore, const uint32_t reg, uint64_t *value)
+{
+	int fd = -1;
+	int ret = -1;
+
+	RTE_VERIFY(value != NULL);
+	if (value == NULL)
+		return -1;
+
+	fd = __msr_open_file(lcore, O_RDONLY);
+
+	if (fd >= 0) {
+		ssize_t read_ret = 0;
+
+		read_ret = pread(fd, value, sizeof(value[0]), (off_t)reg);
+
+		if (read_ret != sizeof(value[0])) {
+			RTE_LOG(ERR, PQOS, "RDMSR failed for reg[0x%x] on lcore %u\n",
+				(unsigned)reg, lcore);
+		} else
+			ret = 0;
+
+		close(fd);
+	}
+
+	return ret;
+}
+
+/**
+ * Function to write CPU's MSR
+ *
+ * @param [in] lcore
+ *  CPU logical core id
+ *
+ * @param [in] reg
+ *  MSR reg to write
+ *
+ * @param [in] value
+ *  Value to be written to MSR reg
+ *
+ * @return
+ *  Operations status
+*/
+static inline int
+rte_msr_write(const unsigned lcore, const uint32_t reg, const uint64_t value)
+{
+	int fd = -1;
+	int ret = -1;
+
+	fd = __msr_open_file(lcore, O_WRONLY);
+
+	if (fd >= 0) {
+		ssize_t write_ret = 0;
+
+		write_ret = pwrite(fd, &value, sizeof(value), (off_t)reg);
+		if (write_ret != sizeof(value)) {
+			RTE_LOG(ERR, PQOS, "WRMSR failed for reg[0x%x] <- value[0x%llx] on "
+					"lcore %u\n", (unsigned)reg, (unsigned long long)value, lcore);
+		} else
+			ret = 0;
+
+		close(fd);
+	}
+
+	return ret;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_MSR_X86_64_H_ */
-- 
1.9.3